colin 94c3d5f8ad Splite ram and rom to bank=8.		2022-03-23 13:00:34 +00:00
..
dpi	Add jtag	2022-03-07 13:08:10 +00:00
JSON.pm	Add jtag	2022-03-07 13:08:10 +00:00
Makefile	Add jtag	2022-03-07 13:08:10 +00:00
ahb_sif.sv	Splite ram and rom to bank=8.	2022-03-23 13:00:34 +00:00
axi_lsu_dma_bridge.sv	Add jtag	2022-03-07 13:08:10 +00:00
dasm.svi	Add jtag	2022-03-07 13:08:10 +00:00
soc_sim.mk	Add jtag	2022-03-07 13:08:10 +00:00
soc_sim.sv	Splite ram and rom to bank=8.	2022-03-23 13:00:34 +00:00
soc_top.mk	Add jtag	2022-03-07 13:08:10 +00:00
soc_top.sv	Add temp fpga file : synth.sh	2022-03-09 14:44:11 +00:00
swerv.config	Enable gdb by openocd.	2022-03-08 09:18:19 +00:00
swerv_config_gen.py	Add jtag	2022-03-07 13:08:10 +00:00