2015-06-09 18:45:45 +08:00
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2017-10-21 08:54:19 +08:00
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VIVADO_BASE = /opt/Xilinx/Vivado/2017.3
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2015-07-17 00:59:58 +08:00
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VIVADO = $(VIVADO_BASE)/bin/vivado
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XVLOG = $(VIVADO_BASE)/bin/xvlog
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XELAB = $(VIVADO_BASE)/bin/xelab
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GLBL = $(VIVADO_BASE)/data/verilog/src/glbl.v
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2015-07-09 08:48:14 +08:00
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TOOLCHAIN_PREFIX = riscv64-unknown-elf-
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export VIVADO
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2015-06-09 18:45:45 +08:00
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2017-07-20 15:56:30 +08:00
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# work-around for http://svn.clifford.at/handicraft/2016/vivadosig11
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export RDI_VERBOSE = False
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2015-06-09 18:45:45 +08:00
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help:
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2015-07-09 08:48:14 +08:00
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@echo ""
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@echo "Simple synthesis tests:"
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@echo " make synth_area_{small|regular|large}"
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@echo " make synth_speed"
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@echo ""
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@echo "Example system:"
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@echo " make synth_system"
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@echo " make sim_system"
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@echo ""
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@echo "Timing and Utilization Evaluation:"
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@echo " make table.txt"
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@echo " make area"
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@echo ""
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2015-06-09 18:45:45 +08:00
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synth_%:
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2015-06-28 05:05:00 +08:00
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rm -f $@.log
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2015-06-09 18:45:45 +08:00
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$(VIVADO) -nojournal -log $@.log -mode batch -source $@.tcl
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2015-06-10 22:48:06 +08:00
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rm -rf .Xil fsm_encoding.os synth_*.backup.log usage_statistics_webtalk.*
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2015-06-28 05:05:00 +08:00
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-grep -B4 -A10 'Slice LUTs' $@.log
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-grep -B1 -A9 ^Slack $@.log && echo
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2015-06-09 18:45:45 +08:00
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2015-07-09 08:48:14 +08:00
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synth_system: firmware.hex
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sim_system:
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$(XVLOG) system_tb.v synth_system.v
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$(XVLOG) $(GLBL)
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$(XELAB) -L unifast_ver -L unisims_ver -R system_tb glbl
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firmware.hex: firmware.S firmware.c firmware.lds
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$(TOOLCHAIN_PREFIX)gcc -Os -m32 -ffreestanding -nostdlib -o firmware.elf firmware.S firmware.c \
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2015-07-16 17:10:02 +08:00
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--std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc
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2015-07-09 08:48:14 +08:00
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$(TOOLCHAIN_PREFIX)objcopy -O binary firmware.elf firmware.bin
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2015-07-16 17:10:02 +08:00
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python3 ../../firmware/makehex.py firmware.bin 4096 > firmware.hex
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2015-07-09 08:48:14 +08:00
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2015-06-27 19:55:33 +08:00
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tab_%/results.txt:
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bash tabtest.sh $@
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2015-07-02 04:18:20 +08:00
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area: synth_area_small synth_area_regular synth_area_large
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-grep -B4 -A10 'Slice LUTs' synth_area_small.log synth_area_regular.log synth_area_large.log
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2017-07-20 15:56:30 +08:00
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table.txt: tab_small_xc7k_2/results.txt tab_small_xc7k_3/results.txt
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table.txt: tab_small_xc7v_2/results.txt tab_small_xc7v_3/results.txt
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table.txt: tab_small_xcku_2/results.txt tab_small_xcku_3/results.txt
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table.txt: tab_small_xcvu_2/results.txt tab_small_xcvu_3/results.txt
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table.txt: tab_small_xckup_2/results.txt tab_small_xckup_3/results.txt
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table.txt: tab_small_xcvup_2/results.txt tab_small_xcvup_3/results.txt
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2015-06-27 19:55:33 +08:00
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table.txt:
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bash table.sh > table.txt
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2015-07-09 08:48:14 +08:00
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clean:
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rm -rf .Xil/ firmware.bin firmware.elf firmware.hex firmware.map synth_*.log
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rm -rf synth_*.mmi synth_*.bit synth_system.v table.txt tab_*/ webtalk.jou
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2015-07-16 17:10:02 +08:00
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rm -rf webtalk.log webtalk_*.jou webtalk_*.log xelab.* xsim[._]* xvlog.*
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2015-07-09 08:48:14 +08:00
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