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remove compressed_instr.

This commit is contained in:
colin.liang 2023-01-12 19:55:50 +08:00
parent 6e318265dc
commit 361dba595d
1 changed files with 5 additions and 11 deletions
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16
picorv32.v
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@ -371,7 +371,6 @@ module picorv32 #(
reg decoder_trigger_q; reg decoder_trigger_q;
reg decoder_pseudo_trigger; reg decoder_pseudo_trigger;
reg decoder_pseudo_trigger_q; reg decoder_pseudo_trigger_q;
reg compressed_instr;
reg is_lui_auipc_jal; reg is_lui_auipc_jal;
reg is_lb_lh_lw_lbu_lhu; reg is_lb_lh_lw_lbu_lhu;
@ -608,8 +607,6 @@ module picorv32 #(
if (mem_rdata_latched[6:0] == 7'b0001011 && mem_rdata_latched[31:25] == 7'b0000010) if (mem_rdata_latched[6:0] == 7'b0001011 && mem_rdata_latched[31:25] == 7'b0000010)
decoded_rs1 <= irqregs_offset; // instr_retirq decoded_rs1 <= irqregs_offset; // instr_retirq
compressed_instr <= 0;
end end
if (decoder_trigger && !decoder_pseudo_trigger) begin if (decoder_trigger && !decoder_pseudo_trigger) begin
@ -772,7 +769,6 @@ module picorv32 #(
reg latched_store; reg latched_store;
reg latched_stalu; reg latched_stalu;
reg latched_branch; reg latched_branch;
reg latched_compr;
reg latched_trace; reg latched_trace;
reg latched_is_lu; reg latched_is_lu;
reg latched_is_lh; reg latched_is_lh;
@ -843,7 +839,7 @@ module picorv32 #(
(* parallel_case *) (* parallel_case *)
case (1'b1) case (1'b1)
latched_branch: begin latched_branch: begin
cpuregs_wrdata = reg_pc + (latched_compr ? 2 : 4); cpuregs_wrdata = reg_pc + 4;
cpuregs_write = 1; cpuregs_write = 1;
end end
latched_store && !latched_branch: begin latched_store && !latched_branch: begin
@ -851,7 +847,7 @@ module picorv32 #(
cpuregs_write = 1; cpuregs_write = 1;
end end
irq_state[0]: begin irq_state[0]: begin
cpuregs_wrdata = reg_next_pc | latched_compr; cpuregs_wrdata = reg_next_pc;
cpuregs_write = 1; cpuregs_write = 1;
end end
irq_state[1]: begin irq_state[1]: begin
@ -972,7 +968,7 @@ module picorv32 #(
`debug($display( `debug($display(
"ST_RD: %2d 0x%08x, BRANCH 0x%08x", "ST_RD: %2d 0x%08x, BRANCH 0x%08x",
latched_rd, latched_rd,
reg_pc + (latched_compr ? 2 : 4), reg_pc + 4,
current_pc current_pc
);) );)
end end
@ -1009,23 +1005,21 @@ module picorv32 #(
latched_is_lh <= 0; latched_is_lh <= 0;
latched_is_lb <= 0; latched_is_lb <= 0;
latched_rd <= decoded_rd; latched_rd <= decoded_rd;
latched_compr <= compressed_instr;
if (((decoder_trigger && !irq_active && !irq_delay && |(irq_pending & ~irq_mask)) || irq_state)) begin if (((decoder_trigger && !irq_active && !irq_delay && |(irq_pending & ~irq_mask)) || irq_state)) begin
irq_state <= irq_state == 2'b00 ? 2'b01 : irq_state == 2'b01 ? 2'b10 : 2'b00; irq_state <= irq_state == 2'b00 ? 2'b01 : irq_state == 2'b01 ? 2'b10 : 2'b00;
latched_compr <= latched_compr;
latched_rd <= irqregs_offset | irq_state[0]; latched_rd <= irqregs_offset | irq_state[0];
end else if ((decoder_trigger || do_waitirq) && instr_waitirq) begin end else if ((decoder_trigger || do_waitirq) && instr_waitirq) begin
if (irq_pending) begin if (irq_pending) begin
latched_store <= 1; latched_store <= 1;
reg_out <= irq_pending; reg_out <= irq_pending;
reg_next_pc <= current_pc + (compressed_instr ? 2 : 4); reg_next_pc <= current_pc + 4;
mem_do_rinst <= 1; mem_do_rinst <= 1;
end else do_waitirq <= 1; end else do_waitirq <= 1;
end else if (decoder_trigger) begin end else if (decoder_trigger) begin
`debug($display("-- %-0t", $time);) `debug($display("-- %-0t", $time);)
irq_delay <= irq_active; irq_delay <= irq_active;
reg_next_pc <= current_pc + (compressed_instr ? 2 : 4); reg_next_pc <= current_pc + 4;
if (ENABLE_TRACE) latched_trace <= 1; if (ENABLE_TRACE) latched_trace <= 1;
count_instr <= count_instr + 1; count_instr <= count_instr + 1;
if (instr_jal) begin if (instr_jal) begin