remove compressed_instr.
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6e318265dc
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361dba595d
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picorv32.v
16
picorv32.v
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@ -371,7 +371,6 @@ module picorv32 #(
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reg decoder_trigger_q;
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reg decoder_pseudo_trigger;
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reg decoder_pseudo_trigger_q;
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reg compressed_instr;
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reg is_lui_auipc_jal;
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reg is_lb_lh_lw_lbu_lhu;
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@ -608,8 +607,6 @@ module picorv32 #(
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if (mem_rdata_latched[6:0] == 7'b0001011 && mem_rdata_latched[31:25] == 7'b0000010)
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decoded_rs1 <= irqregs_offset; // instr_retirq
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compressed_instr <= 0;
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end
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if (decoder_trigger && !decoder_pseudo_trigger) begin
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@ -772,7 +769,6 @@ module picorv32 #(
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reg latched_store;
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reg latched_stalu;
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reg latched_branch;
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reg latched_compr;
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reg latched_trace;
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reg latched_is_lu;
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reg latched_is_lh;
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@ -843,7 +839,7 @@ module picorv32 #(
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(* parallel_case *)
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case (1'b1)
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latched_branch: begin
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cpuregs_wrdata = reg_pc + (latched_compr ? 2 : 4);
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cpuregs_wrdata = reg_pc + 4;
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cpuregs_write = 1;
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end
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latched_store && !latched_branch: begin
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@ -851,7 +847,7 @@ module picorv32 #(
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cpuregs_write = 1;
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end
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irq_state[0]: begin
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cpuregs_wrdata = reg_next_pc | latched_compr;
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cpuregs_wrdata = reg_next_pc;
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cpuregs_write = 1;
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end
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irq_state[1]: begin
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@ -972,7 +968,7 @@ module picorv32 #(
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`debug($display(
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"ST_RD: %2d 0x%08x, BRANCH 0x%08x",
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latched_rd,
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reg_pc + (latched_compr ? 2 : 4),
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reg_pc + 4,
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current_pc
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);)
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end
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@ -1009,23 +1005,21 @@ module picorv32 #(
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latched_is_lh <= 0;
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latched_is_lb <= 0;
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latched_rd <= decoded_rd;
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latched_compr <= compressed_instr;
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if (((decoder_trigger && !irq_active && !irq_delay && |(irq_pending & ~irq_mask)) || irq_state)) begin
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irq_state <= irq_state == 2'b00 ? 2'b01 : irq_state == 2'b01 ? 2'b10 : 2'b00;
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latched_compr <= latched_compr;
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latched_rd <= irqregs_offset | irq_state[0];
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end else if ((decoder_trigger || do_waitirq) && instr_waitirq) begin
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if (irq_pending) begin
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latched_store <= 1;
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reg_out <= irq_pending;
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reg_next_pc <= current_pc + (compressed_instr ? 2 : 4);
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reg_next_pc <= current_pc + 4;
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mem_do_rinst <= 1;
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end else do_waitirq <= 1;
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end else if (decoder_trigger) begin
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`debug($display("-- %-0t", $time);)
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irq_delay <= irq_active;
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reg_next_pc <= current_pc + (compressed_instr ? 2 : 4);
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reg_next_pc <= current_pc + 4;
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if (ENABLE_TRACE) latched_trace <= 1;
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count_instr <= count_instr + 1;
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if (instr_jal) begin
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