Removed multiplier/divider
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parent
f47ac81c89
commit
73318eaeab
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@ -0,0 +1,11 @@
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firmware.d
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firmware.elf
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firmware.hex
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firmware32.hex
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firmware.o
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firmware_addr.txt
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firmware_dbg.v
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syscalls.o
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testbench.vvp
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testbench.vcd
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start.elf
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@ -0,0 +1,53 @@
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ifndef RISCV_TOOLS_PREFIX
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RISCV_TOOLS_PREFIX = /opt/riscv32ic/bin/riscv32-unknown-elf-
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endif
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CXX = $(RISCV_TOOLS_PREFIX)g++ -march=rv32i
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CC = $(RISCV_TOOLS_PREFIX)gcc -march=rv32i
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AS = $(RISCV_TOOLS_PREFIX)gcc -march=rv32i
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CXXFLAGS = -MD -Os -Wall -std=c++11
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CCFLAGS = -MD -Os -Wall
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#LDFLAGS = -Wl,--gc-sections,--no-relax
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LDFLAGS = -Wl,--gc-sections
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LDLIBS =
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test: testbench.vvp firmware32.hex
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vvp -l testbench.log -N testbench.vvp
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testbench.vvp: testbench.v ../../picorv32.v firmware_dbg.v
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iverilog -D WRITE_VCD=1 -o testbench.vvp testbench.v ../../picorv32.v
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chmod -x testbench.vvp
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firmware32.hex: firmware.elf hex8tohex32.py
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$(RISCV_TOOLS_PREFIX)objcopy -O verilog firmware.elf firmware.tmp
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python3 hex8tohex32.py firmware.tmp > firmware32.hex
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#firmware32.hex: firmware.elf start.elf hex8tohex32.py
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# $(RISCV_TOOLS_PREFIX)objcopy -O verilog start.elf start.tmp
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# $(RISCV_TOOLS_PREFIX)objcopy -O verilog firmware.elf firmware.tmp
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# cat start.tmp firmware.tmp > firmware.hex
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# python3 hex8tohex32.py firmware.hex > firmware32.hex
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# rm -f start.tmp firmware.tmp
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firmware_dbg.v: firmware.map
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python3 map2debug.py
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#firmware.o: firmware.c
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# $(CC) -c $^
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start.o: start.S
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$(CC) -c -nostdlib start.S $(LDLIBS)
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firmware.elf: firmware.o syscalls.o start.o
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$(CC) $(LDFLAGS),-Map=firmware.map -o $@ $^ -T sections.lds $(LDLIBS)
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chmod -x firmware.elf
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start.elf: start.S start.ld
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$(CC) -nostdlib -o start.elf start.S -T start.ld $(LDLIBS)
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chmod -x start.elf
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clean:
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rm -f *.o *.d *.tmp start.elf
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rm -f firmware.elf firmware.hex firmware32.hex
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rm -f testbench.vvp testbench.vcd
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-include *.d
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.PHONY: test clean
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@ -33,7 +33,7 @@ SECTIONS {
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*(.sdata .sdata.*)
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. = ALIGN(4);
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_edata = .;
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/* } >ram AT>rom */
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} >ram AT>rom
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/* } >ram */
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.bss : {
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@ -79,7 +79,6 @@ sw zero,12(sp)
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2:
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*/
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/* jump to libc init */
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/*j _ftext
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*/
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@ -3,7 +3,7 @@
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//`undef WRITE_VCD
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`undef MEM8BIT
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`define ROM_SIZE 32'h0000_0000
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`define ROM_SIZE 32'h0001_00FF
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//`define ROM_SIZE 32'h0000_0000
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module testbench;
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@ -30,9 +30,7 @@ module testbench;
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picorv32 #(
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.COMPRESSED_ISA(1),
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.PROGADDR_RESET(32'h100),
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.ENABLE_MUL(1),
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.ENABLE_DIV(1)
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.PROGADDR_RESET(32'h100)
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) uut (
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.clk (clk ),
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.resetn (resetn ),
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end
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`else
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reg [31:0] memory [0:MEM_SIZE/4-1];
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`define data_lma 32'hc430
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`define data 32'h20000
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`define edata 32'h209b0
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integer x;
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initial
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begin
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// clear memory
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for (x=0; x<MEM_SIZE/4; x=x+1) memory[x] = 0;
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// load rom contents
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$readmemh("firmware32.hex", memory);
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// copy .data section
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for (x=0; x<(`edata - `data); x=x+4)
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memory[(`data+x)/4] = memory[(`data_lma+x)/4];
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end
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`endif
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