Claire Xenia Wolf
100e421be0
Fix copyright info
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Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2021-12-02 15:59:12 +01:00
Steffen Vogel
d21937bafc
picosoc: increase available memory by using SPRAM instead of BRAM for the Icebreaker example
2019-02-11 23:13:05 +01:00
Clifford Wolf
1afe3af452
Add PicoSoC IceBreaker demo
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-18 20:17:21 +02:00
Olof Kindgren
75aa1055f8
Expose ENABLE_IRQ_QREGS and PROGADDR_IRQ from picosoc.v
2018-08-16 22:06:26 +02:00
Olof Kindgren
2ceb472178
Bypass picosoc compile order check if PICORV32_REGS is defined.
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Previously, picosoc.v needed to be sourced before picorv32.v to
ensure that the PICORV32_REGS `define (used to select implementation
for the register file) was set to picosoc_regs
This allows for overriding PICORV32_REGS, e.g. by setting it
externally in the EDA tool invocation. In this case, the compile
order between picorv32.v and picosoc.v is not important.
Note: This change will break the safety check if PICORV32_REGS
is defined between sourcing picorv32.v and picosoc.v
2018-05-18 23:52:31 +02:00
Clifford Wolf
ad08edd2e5
Add PICORV32_REGS mechanism for ASIC sram instantiation
2017-10-01 15:45:46 +02:00
Clifford Wolf
694b9390fd
Enable a bunch of PicoRV32 features in PicoSoC
2017-09-22 04:52:44 +02:00
Clifford Wolf
2cc1256ce7
Improve PicoSoC demo firmware
2017-09-18 00:43:38 +02:00
Clifford Wolf
48b13daef2
Update picosoc memory map
2017-09-15 14:47:50 +02:00
Clifford Wolf
99f0cafd19
Add simple UART to PicoSoC
2017-08-11 19:30:53 +02:00
Clifford Wolf
78f2f5efd2
Add support for QSPI DDR mode, Add SPI MEMIO config reg
2017-08-11 15:57:42 +02:00
Clifford Wolf
ff7855900d
Refactor picosoc flash_io interfaces
2017-08-07 16:27:57 +02:00
Clifford Wolf
db2222ec02
Refactor picosoc code
2017-08-07 15:13:27 +02:00
Clifford Wolf
caef4e3753
Rename "spiflash" example to "picosoc"
2017-08-07 13:38:07 +02:00