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  • f6b14b047b Refine memory interface. Change start addr from 10000 to 0. master colin.liang 2023-01-18 21:04:15 +0800
  • 780c18e008 Remove debug function. colin.liang 2023-01-17 20:59:02 +0800
  • dfc2c47327 Refine memory interface. colin.liang 2023-01-17 16:09:28 +0800
  • 7f42e7f7a4 Refine picorv code. colin.liang 2023-01-17 14:37:11 +0800
  • b03844d9ac remove irq in testbench. colin.liang 2023-01-17 13:01:41 +0800
  • dcab0c3178 Delete trace code in picorv. colin.liang 2023-01-17 13:00:31 +0800
  • ef6fb8848f Remove irq support. colin.liang 2023-01-16 20:41:28 +0800
  • 2b3f3d3f3d Move debug from core to test bench. colin.liang 2023-01-13 16:11:36 +0800
  • 287e1416ea Add console.log output. colin.liang 2023-01-13 15:44:41 +0800
  • e345620054 Add dhry.hex build in the top makefile. colin.liang 2023-01-13 15:32:58 +0800
  • 2cf0e04e02 Add disasmmably. colin.liang 2023-01-13 15:10:40 +0800
  • eab4b918b9 Refine testbench.v. colin.liang 2023-01-13 14:57:13 +0800
  • e44af58d63 Refine hex file index from verialtor c code. colin.liang 2023-01-13 14:49:21 +0800
  • ce40766cbd Refine tester. test common and dhry at the same time. colin.liang 2023-01-12 21:18:03 +0800
  • 361dba595d remove compressed_instr. colin.liang 2023-01-12 19:55:50 +0800
  • 6e318265dc format code. colin.liang 2023-01-12 19:00:41 +0800
  • 2d6b66d3b4 remove BARREL_SHIFTER. colin.liang 2023-01-12 17:48:48 +0800
  • 3cfab6b748 remove TWO_STAGE_SHIFT. colin.liang 2023-01-12 17:36:57 +0800
  • b5edff85f7 Remove TWO_CYCLE_COMPARE. colin.liang 2023-01-12 17:35:47 +0800
  • bb0bf253eb remove TWO_CYCLE_ALU. colin.liang 2023-01-12 17:31:14 +0800
  • 4beed17d0a Format code. colin.liang 2023-01-12 17:22:59 +0800
  • 665f26dc63 remove unsed. colin.liang 2023-01-12 17:09:59 +0800
  • 1436980611 remove WITH_PCPI. colin.liang 2023-01-12 17:07:04 +0800
  • 92b7265264 Remote unuse fast mul code. colin.liang 2023-01-12 17:04:17 +0800
  • 9adf1c0029 Remove Config of IRQ, Use reg module from latch. colin.liang 2023-01-12 17:02:34 +0800
  • 9c0d7d7593 Remove MUL DIV config paremeter. colin.liang 2023-01-12 16:27:05 +0800
  • af85947a58 Remote ENABLE_REGS_DUALPORT and init reg zero. colin.liang 2023-01-12 16:09:10 +0800
  • 8b3d3390f5 Remove CATCH_MISALIGN CATCH_ILLINSN. colin.liang 2023-01-12 16:05:34 +0800
  • d9e14153fc Remote COMPOSE_ISA support. colin.liang 2023-01-12 15:58:11 +0800
  • 8196dedc35 TTTT. test colin.liang 2023-01-12 15:38:54 +0800
  • b99c193120 Remove counter parameter. Default enable. colin.liang 2023-01-10 20:52:25 +0800
  • f714dd5da4 Change stackpoint to h0001_0000. colin.liang 2023-01-10 20:28:17 +0800
  • a015d7d595 Remove no use default config. colin.liang 2023-01-10 19:59:13 +0800
  • d1b0213ff0 Default donot use compress isa. colin.liang 2023-01-10 19:56:05 +0800
  • d4ce161c1c format testbench. colin.liang 2023-01-10 15:44:16 +0800
  • 42e498aa28 mv from picorv to testbench colin.liang 2023-01-10 15:43:08 +0800
  • 0e6103f51f Remove wb RAM. colin.liang 2023-01-09 20:05:40 +0800
  • 6d34315889 remove unused picorv32. colin.liang 2023-01-09 18:23:42 +0800
  • 3feacd84c4 Delete RISCV_FORMAL_ALTOPS. colin.liang 2023-01-09 15:35:06 +0800
  • f02c0b23c4 Delete axi ez sp. colin.liang 2023-01-09 15:33:37 +0800
  • c676992a07 Remove RISCV_FORMAL. colin.liang 2023-01-09 13:26:32 +0800
  • 3bda5c9e63 Fix to run environment problem. colin.liang 2023-01-07 19:37:25 +0800
  • f00a88c36e
         Merge pull request #209 from YosysHQ/micko/cleanups Claire Xen 2022-01-03 16:03:13 +0100
  • e8dbd9ac6a Fix dhrystone Miodrag Milanovic 2021-12-27 11:09:39 +0100
  • d330c1406b fix for check target Miodrag Milanovic 2021-12-27 10:52:12 +0100
  • b08952b896 Fix gitignore Miodrag Milanovic 2021-12-27 10:18:51 +0100
  • 0b87954437 Fix simulation Miodrag Milanovic 2021-12-27 10:18:30 +0100
  • 1d9f5b7678
         Merge pull request #166 from tommythorn/master Claire Xen 2021-12-06 16:10:29 +0100
  • 6b1397700f
         Merge pull request #173 from tonymmm1/hx8kdemo-nextpnr Claire Xen 2021-12-06 16:09:28 +0100
  • 354f65ab4a
         Merge pull request #202 from osresearch/icebreaker-fast-mul Claire Xen 2021-12-06 16:09:00 +0100
  • e8edf98772 add license file Miodrag Milanovic 2021-12-03 15:54:08 +0100
  • 100e421be0 Fix copyright info Claire Xenia Wolf 2021-12-02 15:59:12 +0100
  • eeca10190b picosoc: enable fast multiply option for icebreaker Trammell Hudson 2021-09-02 16:35:38 +0000
  • 8588576692 changed hx8kdemo from arachne-pnr to nextpnr-ice40 tonymmm1 2020-08-09 20:58:19 -0500
  • 2cce6f4e8b Enable the use of 64-bit riscv tools Tommy Thorn 2020-06-03 00:48:04 -0700
  • f9b1beb4cf Make Makefile more flexible Larry Doolittle 2020-04-27 17:23:45 +0200
  • 59ef49564f Remove obsolete line from firmware/sections.lds Larry Doolittle 2020-04-23 18:01:24 +0200
  • 25c58766c3 Disable RVC in tests/jal.S and tests/jalr.S Larry Doolittle 2020-04-23 18:00:51 +0200
  • e03c43ea43 Add plusargs support to testbench.cc Larry Doolittle 2020-04-23 18:00:16 +0200
  • 9129d18bf5 Cleanup whitespaces Larry Doolittle 2020-04-23 17:58:32 +0200
  • 409d0dfd67
         Merge pull request #145 from Novakov/patch-1 Claire Wolf 2020-04-22 17:32:19 +0200
  • fe1ee2c739
         Merge pull request #152 from RolinBert/master Claire Wolf 2020-04-22 17:31:29 +0200
  • 65e72ea49e
         Merge pull request #156 from dehann/patch-1 Claire Wolf 2020-04-22 17:25:28 +0200
  • fb34c8aca9
         Merge pull request #148 from splinedrive/disable_memory_test Claire Wolf 2020-04-22 17:25:05 +0200
  • 824a5c8011
         Merge pull request #158 from rxrbln/uart Claire Wolf 2020-04-15 18:49:23 +0200
  • a7ff70dfb4 added default clk divider parameter to simpleuart René Rebe 2020-04-15 13:11:55 +0200
  • b428e843cd
         fix icebreaker links dehann 2020-04-12 14:42:45 -0400
  • fac01cee1c - fix missing brackets Robert Korn 2020-03-30 19:00:28 +0200
  • 258d63d476 - fix missed timer interrupts, when another interrupt activates shortly before Robert Korn 2020-03-27 07:26:48 +0100
  • 1b6821d1a1 Workarround: Disable cmd_memtest() when starting firmware. Hirosh Dabui 2020-01-27 00:14:08 +0100
  • 0201e8ff02
         spimemio documentation: read latency reset value Maciej T. Nowak 2020-01-03 21:57:19 +0100
  • e308982e18
         Merge pull request #141 from rxrbln/master Clifford Wolf 2019-11-18 14:21:10 +0100
  • 1e24e99970 added CROSS prefix and CFLAGS to the picsoc/Makefile so one can run it with other toolchains, e.g. CROSS=riscv64-t2-linux-gnu- CFLAGS=-mabi=ilp32, too René Rebe 2019-11-14 12:26:47 +0100
  • 46aa89c13f
         Merge pull request #138 from pcotret/patch-1 Clifford Wolf 2019-10-31 11:25:37 +0100
  • 415382761c
         Short modification in the error string Pascal Cotret 2019-10-29 16:42:24 +0100
  • 77277a0d32 Fix typo, closes #136 Clifford Wolf 2019-09-25 11:28:08 +0200
  • 3f9b5048bc Fix initialization of "irq" in verilog testbench Clifford Wolf 2019-09-22 13:59:43 +0200
  • 881f928e05 Improve showtrace.py (and fix for new binutils) Clifford Wolf 2019-09-21 13:19:15 +0200
  • 392ee1dd91 Improve test firmware, increase testbench memory size to 128kB Clifford Wolf 2019-09-12 10:48:14 +0200
  • 3bb692a954
         Merge pull request #131 from tomverbeure/dhry_trace Clifford Wolf 2019-08-19 13:12:54 +0200
  • 6edd0bfe14 Add tracing support to dhrystone test Tom Verbeure 2019-08-18 08:32:45 -0700
  • d124abbacd
         Update README.md Clifford Wolf 2019-08-09 09:23:17 +0200
  • e6779ba52b Disable verilator warnings, fixes #128 Clifford Wolf 2019-08-06 15:16:06 +0200
  • d046cbfa49 Add PICORV32_TESTBUG_nnn ifdefs for testing purposes Clifford Wolf 2019-06-30 11:30:18 +0200
  • 18cd609853 Add rvfi_ixl Clifford Wolf 2019-06-26 00:07:16 +0200
  • e0baf2e0bd Add RVFI CSRs Clifford Wolf 2019-06-07 00:04:37 +0200
  • 3d36751b88 Do not peek into core for cycle count in WB testbench Clifford Wolf 2019-06-03 08:17:08 +0200
  • f3a42746ca Do not peek into core for cycle count in testbench Clifford Wolf 2019-06-03 08:14:16 +0200
  • b7e82dfcd1 Merge branch 'yanghao-master' Clifford Wolf 2019-04-28 10:32:49 +0200
  • cf69d4da58 Undo Makefile changes Clifford Wolf 2019-04-28 10:32:23 +0200
  • d60ffd8eea fix firmware/sections.lds section size alignment on 4 bytes Yanghao Hua 2019-04-27 12:37:35 +0200
  • 507f49d086
         Merge pull request #117 from Fatsie/wbdoc Clifford Wolf 2019-04-17 13:02:49 +0200
  • 11d28a0f50 README.md: Also refer to picorv32_wb Staf Verhaegen 2019-03-28 11:04:35 +0100
  • f48f5fe970 Add Verilator version infos Clifford Wolf 2019-03-19 14:33:50 +0100
  • 6d145b708d Rename decoded_imm_uj to decoded_imm_j Clifford Wolf 2019-03-02 14:29:27 -0800
  • 6efa7d1c8b Remove riscv-dejagnu from "make build-tools" Clifford Wolf 2019-03-02 14:06:11 -0800
  • 348de8e797 Remove riscv-qemu from "make build-tools" Clifford Wolf 2019-03-02 13:48:11 -0800
  • 1d42f5725b
         Merge pull request #114 from csquaredphd/master Clifford Wolf 2019-03-02 14:11:59 -0800
  • 243a09fd8d Add buffer cell to scripts/yosys/synth_gates.lib Clifford Wolf 2019-03-02 09:17:56 -0800
  • 7ac4102fc4 fix typo in picosoc/Makefile for hx8k board Chris Clark 2019-03-01 19:57:22 -0500