quasar/el2_lsu.anno.json

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[
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_dma_rdata",
"sources":[
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_lsu_single_ecc_error_incr",
"sources":[
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r",
"~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo"
]
},
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{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_picm_rdaddr",
"sources":[
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_lsu_trigger_match_m",
"sources":[
"~el2_lsu|el2_lsu>io_trigger_pkt_any_0_store",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_1_store",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_0_load",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_0_select",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_3_store",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_2_store",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_1_load",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_1_select",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_3_load",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_3_select",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_2_load",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_2_select",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_0_tdata2",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_0_match_",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_1_tdata2",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_1_match_",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_3_tdata2",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_3_match_",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_2_tdata2",
"~el2_lsu|el2_lsu>io_trigger_pkt_any_2_match_",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
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{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_wren",
"sources":[
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
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"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
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"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_lsu_p_valid",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_lsu_p_fast_int",
"~el2_lsu|el2_lsu>io_lsu_p_load",
"~el2_lsu|el2_lsu>io_lsu_p_store",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_lsu|el2_lsu>io_lsu_load_stall_any",
"sources":[
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_wr_data_hi",
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"sources":[
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
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"~el2_lsu|el2_lsu>io_dma_mem_wdata",
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"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
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"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
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"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_rden",
"sources":[
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
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"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
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"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_lsu_p_valid",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_lsu_p_fast_int",
"~el2_lsu|el2_lsu>io_lsu_p_load",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_lsu_p_store",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_picm_rden",
"sources":[
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
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"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
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"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_lsu_p_valid",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_lsu_p_fast_int",
"~el2_lsu|el2_lsu>io_lsu_p_load",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_picm_wren",
"sources":[
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r",
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
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"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
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"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
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"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r"
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]
},
{
"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_lsu|el2_lsu>io_dccm_rd_addr_hi",
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"sources":[
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"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
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"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
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"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
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"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
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{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_ready",
"sources":[
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d"
]
},
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{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_picm_wraddr",
"sources":[
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
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"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
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"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
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"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_lsu_store_stall_any",
"sources":[
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"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
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"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
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"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
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"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
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"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
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{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_lsu_pmu_bus_trxn",
"sources":[
"~el2_lsu|el2_lsu>io_lsu_axi_arready",
"~el2_lsu|el2_lsu>io_lsu_axi_awready",
"~el2_lsu|el2_lsu>io_lsu_axi_wready"
]
},
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{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_dma_ecc_error",
"sources":[
"~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_lsu_fastint_stall_any",
"sources":[
"~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo"
]
},
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{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_lsu_pmu_bus_busy",
"sources":[
"~el2_lsu|el2_lsu>io_lsu_axi_arready",
"~el2_lsu|el2_lsu>io_lsu_axi_awready",
"~el2_lsu|el2_lsu>io_lsu_axi_wready"
]
},
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{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_rd_addr_lo",
"sources":[
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
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"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
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"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
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"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
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"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_lsu|el2_lsu>io_lsu_result_m",
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"sources":[
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
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"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
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"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_picm_wr_data",
"sources":[
"~el2_lsu|el2_lsu>io_dma_mem_wdata",
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_lsu_p_valid",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_lsu_p_fast_int",
"~el2_lsu|el2_lsu>io_lsu_p_load",
"~el2_lsu|el2_lsu>io_lsu_p_store",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
2020-11-18 18:42:14 +08:00
"sink":"~el2_lsu|el2_lsu>io_dccm_wr_addr_lo",
2020-10-22 17:52:47 +08:00
"sources":[
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_dma_mem_write",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
2020-11-18 18:42:14 +08:00
"sink":"~el2_lsu|el2_lsu>io_picm_mken",
2020-10-22 17:52:47 +08:00
"sources":[
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_lsu_p_valid",
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
"~el2_lsu|el2_lsu>io_lsu_p_fast_int",
"~el2_lsu|el2_lsu>io_lsu_p_store",
"~el2_lsu|el2_lsu>io_dma_mem_write",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
2020-11-18 18:42:14 +08:00
"sink":"~el2_lsu|el2_lsu>io_lsu_nonblock_load_valid_m",
2020-10-22 17:52:47 +08:00
"sources":[
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r"
2020-10-22 17:52:47 +08:00
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_wr_data_lo",
"sources":[
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_dma_mem_wdata",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
2020-11-18 18:42:14 +08:00
"sink":"~el2_lsu|el2_lsu>io_lsu_pmu_bus_misaligned",
2020-10-22 17:52:47 +08:00
"sources":[
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
2020-11-18 18:42:14 +08:00
"sink":"~el2_lsu|el2_lsu>io_lsu_nonblock_load_inv_r",
"sources":[
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu|el2_lsu>io_dccm_wr_addr_hi",
2020-10-22 17:52:47 +08:00
"sources":[
"~el2_lsu|el2_lsu>io_dma_dccm_req",
"~el2_lsu|el2_lsu>io_dma_mem_write",
"~el2_lsu|el2_lsu>io_exu_lsu_rs1_d",
"~el2_lsu|el2_lsu>io_dma_mem_addr",
"~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d",
"~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_lsu_offset_d",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_lsu_p_dword",
"~el2_lsu|el2_lsu>io_lsu_p_half",
"~el2_lsu|el2_lsu>io_lsu_p_word",
"~el2_lsu|el2_lsu>io_dma_mem_sz",
"~el2_lsu|el2_lsu>io_picm_rd_data",
"~el2_lsu|el2_lsu>io_dccm_rd_data_hi",
"~el2_lsu|el2_lsu>io_dccm_rd_data_lo",
2020-11-18 18:42:14 +08:00
"~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r",
2020-10-22 17:52:47 +08:00
"~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r"
]
},
{
"class":"firrtl.EmitCircuitAnnotation",
"emitter":"firrtl.VerilogEmitter"
},
{
"class":"firrtl.transforms.BlackBoxResourceAnno",
2020-11-18 18:42:14 +08:00
"target":"el2_lsu.gated_latch",
"resourceId":"/vsrc/gated_latch.v"
2020-10-22 17:52:47 +08:00
},
{
"class":"firrtl.options.TargetDirAnnotation",
"directory":"."
},
{
"class":"firrtl.options.OutputAnnotationFileAnnotation",
"file":"el2_lsu"
},
{
"class":"firrtl.transforms.BlackBoxTargetDirAnno",
"targetDir":"."
}
]