2020-10-22 17:52:47 +08:00
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[
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{
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"class":"firrtl.EmitCircuitAnnotation",
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"emitter":"firrtl.VerilogEmitter"
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},
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{
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"class":"firrtl.transforms.BlackBoxResourceAnno",
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2020-11-27 19:33:17 +08:00
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"target":"el2_lsu_clkdomain.gated_latch",
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"resourceId":"/vsrc/gated_latch.v"
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2020-10-22 17:52:47 +08:00
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},
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{
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"class":"firrtl.options.TargetDirAnnotation",
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"directory":"."
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},
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{
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"class":"firrtl.options.OutputAnnotationFileAnnotation",
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"file":"el2_lsu_clkdomain"
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},
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{
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"class":"firrtl.transforms.BlackBoxTargetDirAnno",
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"targetDir":"."
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}
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]
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