60 lines
2.4 KiB
Plaintext
60 lines
2.4 KiB
Plaintext
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;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
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circuit dmi_wrapper_module :
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extmodule dmi_wrapper :
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input trst_n : UInt<1>
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input tck : Clock
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input tms : UInt<1>
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input tdi : UInt<1>
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output tdo : UInt<1>
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output tdoEnable : UInt<1>
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input core_rst_n : AsyncReset
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input core_clk : Clock
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input jtag_id : UInt<31>
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input rd_data : UInt<32>
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output reg_wr_data : UInt<32>
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output reg_wr_addr : UInt<7>
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output reg_en : UInt<1>
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output reg_wr_en : UInt<1>
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output dmi_hard_reset : UInt<1>
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defname = dmi_wrapper
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module dmi_wrapper_module :
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input clock : Clock
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input reset : UInt<1>
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output io : {flip trst_n : UInt<1>, flip tck : Clock, flip tms : UInt<1>, flip tdi : UInt<1>, tdo : UInt<1>, tdoEnable : UInt<1>, flip core_rst_n : AsyncReset, flip core_clk : Clock, flip jtag_id : UInt<32>, flip rd_data : UInt<32>, reg_wr_data : UInt<32>, reg_wr_addr : UInt<7>, reg_en : UInt<1>, reg_wr_en : UInt<1>, dmi_hard_reset : UInt<1>}
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inst dwrap of dmi_wrapper @[dmi_wrapper.scala 45:21]
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dwrap.dmi_hard_reset is invalid
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dwrap.reg_wr_en is invalid
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dwrap.reg_en is invalid
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dwrap.reg_wr_addr is invalid
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dwrap.reg_wr_data is invalid
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dwrap.rd_data is invalid
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dwrap.jtag_id is invalid
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dwrap.core_clk is invalid
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dwrap.core_rst_n is invalid
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dwrap.tdoEnable is invalid
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dwrap.tdo is invalid
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dwrap.tdi is invalid
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dwrap.tms is invalid
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dwrap.tck is invalid
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dwrap.trst_n is invalid
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io.dmi_hard_reset <= dwrap.dmi_hard_reset @[dmi_wrapper.scala 46:12]
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io.reg_wr_en <= dwrap.reg_wr_en @[dmi_wrapper.scala 46:12]
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io.reg_en <= dwrap.reg_en @[dmi_wrapper.scala 46:12]
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io.reg_wr_addr <= dwrap.reg_wr_addr @[dmi_wrapper.scala 46:12]
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io.reg_wr_data <= dwrap.reg_wr_data @[dmi_wrapper.scala 46:12]
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dwrap.rd_data <= io.rd_data @[dmi_wrapper.scala 46:12]
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dwrap.jtag_id <= io.jtag_id @[dmi_wrapper.scala 46:12]
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dwrap.core_clk <= io.core_clk @[dmi_wrapper.scala 46:12]
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dwrap.core_rst_n <= io.core_rst_n @[dmi_wrapper.scala 46:12]
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io.tdoEnable <= dwrap.tdoEnable @[dmi_wrapper.scala 46:12]
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io.tdo <= dwrap.tdo @[dmi_wrapper.scala 46:12]
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dwrap.tdi <= io.tdi @[dmi_wrapper.scala 46:12]
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dwrap.tms <= io.tms @[dmi_wrapper.scala 46:12]
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dwrap.tck <= io.tck @[dmi_wrapper.scala 46:12]
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dwrap.trst_n <= io.trst_n @[dmi_wrapper.scala 46:12]
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