Aligner Updated
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waleed-lm
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1367
el2_ifu_aln_ctl.fir
1367
el2_ifu_aln_ctl.fir
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@ -578,31 +578,31 @@ module el2_ifu_aln_ctl(
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reg [63:0] _RAND_19;
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reg [63:0] _RAND_19;
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reg [63:0] _RAND_20;
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reg [63:0] _RAND_20;
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`endif // RANDOMIZE_REG_INIT
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`endif // RANDOMIZE_REG_INIT
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wire [15:0] decompressed_io_din; // @[el2_ifu_aln_ctl.scala 350:28]
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wire [15:0] decompressed_io_din; // @[el2_ifu_aln_ctl.scala 366:28]
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wire [31:0] decompressed_io_dout; // @[el2_ifu_aln_ctl.scala 350:28]
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wire [31:0] decompressed_io_dout; // @[el2_ifu_aln_ctl.scala 366:28]
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reg error_stall; // @[el2_ifu_aln_ctl.scala 112:51]
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reg error_stall; // @[el2_ifu_aln_ctl.scala 128:51]
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wire _T = error_stall | io_ifu_async_error_start; // @[el2_ifu_aln_ctl.scala 110:34]
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wire _T = error_stall | io_ifu_async_error_start; // @[el2_ifu_aln_ctl.scala 126:34]
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wire _T_1 = ~io_exu_flush_final; // @[el2_ifu_aln_ctl.scala 110:64]
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wire _T_1 = ~io_exu_flush_final; // @[el2_ifu_aln_ctl.scala 126:64]
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wire error_stall_in = _T & _T_1; // @[el2_ifu_aln_ctl.scala 110:62]
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wire error_stall_in = _T & _T_1; // @[el2_ifu_aln_ctl.scala 126:62]
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reg [1:0] wrptr; // @[el2_ifu_aln_ctl.scala 113:48]
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reg [1:0] wrptr; // @[el2_ifu_aln_ctl.scala 129:48]
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reg [1:0] rdptr; // @[el2_ifu_aln_ctl.scala 114:48]
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reg [1:0] rdptr; // @[el2_ifu_aln_ctl.scala 130:48]
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reg [1:0] f2val; // @[el2_ifu_aln_ctl.scala 116:48]
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reg [1:0] f2val; // @[el2_ifu_aln_ctl.scala 132:48]
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reg [1:0] f1val; // @[el2_ifu_aln_ctl.scala 117:48]
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reg [1:0] f1val; // @[el2_ifu_aln_ctl.scala 133:48]
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reg [1:0] f0val; // @[el2_ifu_aln_ctl.scala 118:48]
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reg [1:0] f0val; // @[el2_ifu_aln_ctl.scala 134:48]
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reg q2off; // @[el2_ifu_aln_ctl.scala 120:48]
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reg q2off; // @[el2_ifu_aln_ctl.scala 136:48]
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reg q1off; // @[el2_ifu_aln_ctl.scala 121:48]
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reg q1off; // @[el2_ifu_aln_ctl.scala 137:48]
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reg q0off; // @[el2_ifu_aln_ctl.scala 122:48]
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reg q0off; // @[el2_ifu_aln_ctl.scala 138:48]
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wire _T_784 = ~error_stall; // @[el2_ifu_aln_ctl.scala 392:39]
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wire _T_784 = ~error_stall; // @[el2_ifu_aln_ctl.scala 408:39]
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wire i0_shift = io_dec_i0_decode_d & _T_784; // @[el2_ifu_aln_ctl.scala 392:37]
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wire i0_shift = io_dec_i0_decode_d & _T_784; // @[el2_ifu_aln_ctl.scala 408:37]
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wire _T_186 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 172:31]
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wire _T_186 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 188:31]
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wire _T_189 = _T_186 & q0off; // @[Mux.scala 27:72]
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wire _T_189 = _T_186 & q0off; // @[Mux.scala 27:72]
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wire _T_187 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 173:11]
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wire _T_187 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 189:11]
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wire _T_190 = _T_187 & q1off; // @[Mux.scala 27:72]
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wire _T_190 = _T_187 & q1off; // @[Mux.scala 27:72]
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wire _T_192 = _T_189 | _T_190; // @[Mux.scala 27:72]
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wire _T_192 = _T_189 | _T_190; // @[Mux.scala 27:72]
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wire _T_188 = rdptr == 2'h2; // @[el2_ifu_aln_ctl.scala 174:11]
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wire _T_188 = rdptr == 2'h2; // @[el2_ifu_aln_ctl.scala 190:11]
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wire _T_191 = _T_188 & q2off; // @[Mux.scala 27:72]
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wire _T_191 = _T_188 & q2off; // @[Mux.scala 27:72]
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wire q0ptr = _T_192 | _T_191; // @[Mux.scala 27:72]
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wire q0ptr = _T_192 | _T_191; // @[Mux.scala 27:72]
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wire _T_202 = ~q0ptr; // @[el2_ifu_aln_ctl.scala 178:26]
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wire _T_202 = ~q0ptr; // @[el2_ifu_aln_ctl.scala 194:26]
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wire [1:0] q0sel = {q0ptr,_T_202}; // @[Cat.scala 29:58]
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wire [1:0] q0sel = {q0ptr,_T_202}; // @[Cat.scala 29:58]
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wire [2:0] qren = {_T_188,_T_187,_T_186}; // @[Cat.scala 29:58]
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wire [2:0] qren = {_T_188,_T_187,_T_186}; // @[Cat.scala 29:58]
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reg [31:0] q1; // @[Reg.scala 27:20]
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reg [31:0] q1; // @[Reg.scala 27:20]
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@ -616,22 +616,22 @@ module el2_ifu_aln_ctl(
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wire [63:0] _T_486 = {q0,q2}; // @[Cat.scala 29:58]
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wire [63:0] _T_486 = {q0,q2}; // @[Cat.scala 29:58]
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wire [63:0] _T_489 = qren[2] ? _T_486 : 64'h0; // @[Mux.scala 27:72]
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wire [63:0] _T_489 = qren[2] ? _T_486 : 64'h0; // @[Mux.scala 27:72]
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wire [63:0] qeff = _T_490 | _T_489; // @[Mux.scala 27:72]
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wire [63:0] qeff = _T_490 | _T_489; // @[Mux.scala 27:72]
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wire [31:0] q0eff = qeff[31:0]; // @[el2_ifu_aln_ctl.scala 294:42]
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wire [31:0] q0eff = qeff[31:0]; // @[el2_ifu_aln_ctl.scala 310:42]
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wire [31:0] _T_497 = q0sel[0] ? q0eff : 32'h0; // @[Mux.scala 27:72]
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wire [31:0] _T_497 = q0sel[0] ? q0eff : 32'h0; // @[Mux.scala 27:72]
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wire [15:0] _T_498 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
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wire [15:0] _T_498 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
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wire [31:0] _GEN_12 = {{16'd0}, _T_498}; // @[Mux.scala 27:72]
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wire [31:0] _GEN_12 = {{16'd0}, _T_498}; // @[Mux.scala 27:72]
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wire [31:0] q0final = _T_497 | _GEN_12; // @[Mux.scala 27:72]
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wire [31:0] q0final = _T_497 | _GEN_12; // @[Mux.scala 27:72]
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wire [31:0] _T_519 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72]
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wire [31:0] _T_519 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72]
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wire _T_514 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 300:58]
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wire _T_514 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58]
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wire _T_516 = _T_514 & f0val[0]; // @[el2_ifu_aln_ctl.scala 300:68]
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wire _T_516 = _T_514 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68]
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wire _T_197 = _T_186 & q1off; // @[Mux.scala 27:72]
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wire _T_197 = _T_186 & q1off; // @[Mux.scala 27:72]
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wire _T_198 = _T_187 & q2off; // @[Mux.scala 27:72]
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wire _T_198 = _T_187 & q2off; // @[Mux.scala 27:72]
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wire _T_200 = _T_197 | _T_198; // @[Mux.scala 27:72]
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wire _T_200 = _T_197 | _T_198; // @[Mux.scala 27:72]
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wire _T_199 = _T_188 & q0off; // @[Mux.scala 27:72]
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wire _T_199 = _T_188 & q0off; // @[Mux.scala 27:72]
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wire q1ptr = _T_200 | _T_199; // @[Mux.scala 27:72]
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wire q1ptr = _T_200 | _T_199; // @[Mux.scala 27:72]
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wire _T_203 = ~q1ptr; // @[el2_ifu_aln_ctl.scala 180:26]
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wire _T_203 = ~q1ptr; // @[el2_ifu_aln_ctl.scala 196:26]
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wire [1:0] q1sel = {q1ptr,_T_203}; // @[Cat.scala 29:58]
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wire [1:0] q1sel = {q1ptr,_T_203}; // @[Cat.scala 29:58]
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wire [31:0] q1eff = qeff[63:32]; // @[el2_ifu_aln_ctl.scala 294:29]
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wire [31:0] q1eff = qeff[63:32]; // @[el2_ifu_aln_ctl.scala 310:29]
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wire [15:0] _T_507 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
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wire [15:0] _T_507 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
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wire [15:0] _T_508 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
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wire [15:0] _T_508 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
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wire [15:0] q1final = _T_507 | _T_508; // @[Mux.scala 27:72]
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wire [15:0] q1final = _T_507 | _T_508; // @[Mux.scala 27:72]
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@ -639,91 +639,91 @@ module el2_ifu_aln_ctl(
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wire [47:0] _T_520 = _T_516 ? _T_518 : 48'h0; // @[Mux.scala 27:72]
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wire [47:0] _T_520 = _T_516 ? _T_518 : 48'h0; // @[Mux.scala 27:72]
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wire [47:0] _GEN_13 = {{16'd0}, _T_519}; // @[Mux.scala 27:72]
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wire [47:0] _GEN_13 = {{16'd0}, _T_519}; // @[Mux.scala 27:72]
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wire [47:0] aligndata = _GEN_13 | _T_520; // @[Mux.scala 27:72]
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wire [47:0] aligndata = _GEN_13 | _T_520; // @[Mux.scala 27:72]
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wire first4B = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 332:29]
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wire first4B = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 348:29]
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wire first2B = ~first4B; // @[el2_ifu_aln_ctl.scala 334:17]
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wire first2B = ~first4B; // @[el2_ifu_aln_ctl.scala 350:17]
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wire shift_2B = i0_shift & first2B; // @[el2_ifu_aln_ctl.scala 396:24]
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wire shift_2B = i0_shift & first2B; // @[el2_ifu_aln_ctl.scala 412:24]
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wire [1:0] _T_444 = {1'h0,f0val[1]}; // @[Cat.scala 29:58]
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wire [1:0] _T_444 = {1'h0,f0val[1]}; // @[Cat.scala 29:58]
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wire [1:0] _T_449 = shift_2B ? _T_444 : 2'h0; // @[Mux.scala 27:72]
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wire [1:0] _T_449 = shift_2B ? _T_444 : 2'h0; // @[Mux.scala 27:72]
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wire _T_445 = ~shift_2B; // @[el2_ifu_aln_ctl.scala 284:6]
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wire _T_445 = ~shift_2B; // @[el2_ifu_aln_ctl.scala 300:6]
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wire shift_4B = i0_shift & first4B; // @[el2_ifu_aln_ctl.scala 397:24]
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wire shift_4B = i0_shift & first4B; // @[el2_ifu_aln_ctl.scala 413:24]
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wire _T_446 = ~shift_4B; // @[el2_ifu_aln_ctl.scala 284:18]
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wire _T_446 = ~shift_4B; // @[el2_ifu_aln_ctl.scala 300:18]
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wire _T_447 = _T_445 & _T_446; // @[el2_ifu_aln_ctl.scala 284:16]
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wire _T_447 = _T_445 & _T_446; // @[el2_ifu_aln_ctl.scala 300:16]
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wire [1:0] _T_450 = _T_447 ? f1val : 2'h0; // @[Mux.scala 27:72]
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wire [1:0] _T_450 = _T_447 ? f1val : 2'h0; // @[Mux.scala 27:72]
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wire [1:0] sf0val = _T_449 | _T_450; // @[Mux.scala 27:72]
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wire [1:0] sf0val = _T_449 | _T_450; // @[Mux.scala 27:72]
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wire sf0_valid = sf0val[0]; // @[el2_ifu_aln_ctl.scala 237:22]
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wire sf0_valid = sf0val[0]; // @[el2_ifu_aln_ctl.scala 253:22]
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wire _T_352 = ~sf0_valid; // @[el2_ifu_aln_ctl.scala 256:26]
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wire _T_352 = ~sf0_valid; // @[el2_ifu_aln_ctl.scala 272:26]
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wire _T_801 = f0val[0] & _T_514; // @[el2_ifu_aln_ctl.scala 400:28]
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wire _T_801 = f0val[0] & _T_514; // @[el2_ifu_aln_ctl.scala 416:28]
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wire f1_shift_2B = _T_801 & shift_4B; // @[el2_ifu_aln_ctl.scala 400:40]
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wire f1_shift_2B = _T_801 & shift_4B; // @[el2_ifu_aln_ctl.scala 416:40]
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wire _T_418 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72]
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wire _T_418 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72]
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wire _T_417 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 277:53]
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wire _T_417 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 293:53]
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wire [1:0] _T_419 = _T_417 ? f1val : 2'h0; // @[Mux.scala 27:72]
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wire [1:0] _T_419 = _T_417 ? f1val : 2'h0; // @[Mux.scala 27:72]
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wire [1:0] _GEN_14 = {{1'd0}, _T_418}; // @[Mux.scala 27:72]
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wire [1:0] _GEN_14 = {{1'd0}, _T_418}; // @[Mux.scala 27:72]
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wire [1:0] sf1val = _GEN_14 | _T_419; // @[Mux.scala 27:72]
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wire [1:0] sf1val = _GEN_14 | _T_419; // @[Mux.scala 27:72]
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wire sf1_valid = sf1val[0]; // @[el2_ifu_aln_ctl.scala 236:22]
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wire sf1_valid = sf1val[0]; // @[el2_ifu_aln_ctl.scala 252:22]
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wire _T_353 = _T_352 & sf1_valid; // @[el2_ifu_aln_ctl.scala 256:37]
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wire _T_353 = _T_352 & sf1_valid; // @[el2_ifu_aln_ctl.scala 272:37]
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wire f2_valid = f2val[0]; // @[el2_ifu_aln_ctl.scala 235:20]
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wire f2_valid = f2val[0]; // @[el2_ifu_aln_ctl.scala 251:20]
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wire _T_354 = _T_353 & f2_valid; // @[el2_ifu_aln_ctl.scala 256:50]
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wire _T_354 = _T_353 & f2_valid; // @[el2_ifu_aln_ctl.scala 272:50]
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wire ifvalid = io_ifu_fetch_val[0]; // @[el2_ifu_aln_ctl.scala 245:30]
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wire ifvalid = io_ifu_fetch_val[0]; // @[el2_ifu_aln_ctl.scala 261:30]
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wire _T_355 = _T_354 & ifvalid; // @[el2_ifu_aln_ctl.scala 256:62]
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wire _T_355 = _T_354 & ifvalid; // @[el2_ifu_aln_ctl.scala 272:62]
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wire _T_356 = sf0_valid & sf1_valid; // @[el2_ifu_aln_ctl.scala 257:17]
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wire _T_356 = sf0_valid & sf1_valid; // @[el2_ifu_aln_ctl.scala 273:17]
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wire _T_357 = ~f2_valid; // @[el2_ifu_aln_ctl.scala 257:32]
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wire _T_357 = ~f2_valid; // @[el2_ifu_aln_ctl.scala 273:32]
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wire _T_358 = _T_356 & _T_357; // @[el2_ifu_aln_ctl.scala 257:30]
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wire _T_358 = _T_356 & _T_357; // @[el2_ifu_aln_ctl.scala 273:30]
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wire _T_359 = _T_358 & ifvalid; // @[el2_ifu_aln_ctl.scala 257:42]
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wire _T_359 = _T_358 & ifvalid; // @[el2_ifu_aln_ctl.scala 273:42]
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wire fetch_to_f2 = _T_355 | _T_359; // @[el2_ifu_aln_ctl.scala 256:74]
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wire fetch_to_f2 = _T_355 | _T_359; // @[el2_ifu_aln_ctl.scala 272:74]
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reg [30:0] f2pc; // @[Reg.scala 27:20]
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reg [30:0] f2pc; // @[Reg.scala 27:20]
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wire _T_336 = ~sf1_valid; // @[el2_ifu_aln_ctl.scala 252:39]
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wire _T_336 = ~sf1_valid; // @[el2_ifu_aln_ctl.scala 268:39]
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wire _T_337 = _T_352 & _T_336; // @[el2_ifu_aln_ctl.scala 252:37]
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wire _T_337 = _T_352 & _T_336; // @[el2_ifu_aln_ctl.scala 268:37]
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wire _T_338 = _T_337 & f2_valid; // @[el2_ifu_aln_ctl.scala 252:50]
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wire _T_338 = _T_337 & f2_valid; // @[el2_ifu_aln_ctl.scala 268:50]
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wire _T_339 = _T_338 & ifvalid; // @[el2_ifu_aln_ctl.scala 252:62]
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wire _T_339 = _T_338 & ifvalid; // @[el2_ifu_aln_ctl.scala 268:62]
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wire _T_343 = _T_353 & _T_357; // @[el2_ifu_aln_ctl.scala 253:30]
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wire _T_343 = _T_353 & _T_357; // @[el2_ifu_aln_ctl.scala 269:30]
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wire _T_344 = _T_343 & ifvalid; // @[el2_ifu_aln_ctl.scala 253:42]
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wire _T_344 = _T_343 & ifvalid; // @[el2_ifu_aln_ctl.scala 269:42]
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wire _T_345 = _T_339 | _T_344; // @[el2_ifu_aln_ctl.scala 252:74]
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wire _T_345 = _T_339 | _T_344; // @[el2_ifu_aln_ctl.scala 268:74]
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wire _T_347 = sf0_valid & _T_336; // @[el2_ifu_aln_ctl.scala 254:17]
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wire _T_347 = sf0_valid & _T_336; // @[el2_ifu_aln_ctl.scala 270:17]
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wire _T_349 = _T_347 & _T_357; // @[el2_ifu_aln_ctl.scala 254:30]
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wire _T_349 = _T_347 & _T_357; // @[el2_ifu_aln_ctl.scala 270:30]
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wire _T_350 = _T_349 & ifvalid; // @[el2_ifu_aln_ctl.scala 254:42]
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wire _T_350 = _T_349 & ifvalid; // @[el2_ifu_aln_ctl.scala 270:42]
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wire fetch_to_f1 = _T_345 | _T_350; // @[el2_ifu_aln_ctl.scala 253:54]
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wire fetch_to_f1 = _T_345 | _T_350; // @[el2_ifu_aln_ctl.scala 269:54]
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wire _T_25 = fetch_to_f1 | _T_354; // @[el2_ifu_aln_ctl.scala 141:33]
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wire _T_25 = fetch_to_f1 | _T_354; // @[el2_ifu_aln_ctl.scala 157:33]
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wire f1_shift_wr_en = _T_25 | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 141:47]
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wire f1_shift_wr_en = _T_25 | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 157:47]
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reg [30:0] f1pc; // @[Reg.scala 27:20]
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reg [30:0] f1pc; // @[Reg.scala 27:20]
|
||||||
wire [30:0] _T_376 = fetch_to_f1 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_376 = fetch_to_f1 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_377 = _T_354 ? f2pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_377 = _T_354 ? f2pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_379 = _T_376 | _T_377; // @[Mux.scala 27:72]
|
wire [30:0] _T_379 = _T_376 | _T_377; // @[Mux.scala 27:72]
|
||||||
wire _T_372 = ~fetch_to_f1; // @[el2_ifu_aln_ctl.scala 267:6]
|
wire _T_372 = ~fetch_to_f1; // @[el2_ifu_aln_ctl.scala 283:6]
|
||||||
wire _T_373 = ~_T_354; // @[el2_ifu_aln_ctl.scala 267:21]
|
wire _T_373 = ~_T_354; // @[el2_ifu_aln_ctl.scala 283:21]
|
||||||
wire _T_374 = _T_372 & _T_373; // @[el2_ifu_aln_ctl.scala 267:19]
|
wire _T_374 = _T_372 & _T_373; // @[el2_ifu_aln_ctl.scala 283:19]
|
||||||
wire [30:0] _T_364 = f1_shift_2B ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
|
wire [30:0] _T_364 = f1_shift_2B ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
|
||||||
reg [30:0] f0pc; // @[Reg.scala 27:20]
|
reg [30:0] f0pc; // @[Reg.scala 27:20]
|
||||||
wire [30:0] f0pc_plus1 = f0pc + 31'h1; // @[el2_ifu_aln_ctl.scala 259:25]
|
wire [30:0] f0pc_plus1 = f0pc + 31'h1; // @[el2_ifu_aln_ctl.scala 275:25]
|
||||||
wire [30:0] _T_365 = _T_364 & f0pc_plus1; // @[el2_ifu_aln_ctl.scala 263:38]
|
wire [30:0] _T_365 = _T_364 & f0pc_plus1; // @[el2_ifu_aln_ctl.scala 279:38]
|
||||||
wire [30:0] _T_368 = _T_417 ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
|
wire [30:0] _T_368 = _T_417 ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
|
||||||
wire [30:0] _T_369 = _T_368 & f0pc; // @[el2_ifu_aln_ctl.scala 263:78]
|
wire [30:0] _T_369 = _T_368 & f0pc; // @[el2_ifu_aln_ctl.scala 279:78]
|
||||||
wire [30:0] sf1pc = _T_365 | _T_369; // @[el2_ifu_aln_ctl.scala 263:52]
|
wire [30:0] sf1pc = _T_365 | _T_369; // @[el2_ifu_aln_ctl.scala 279:52]
|
||||||
wire [30:0] _T_378 = _T_374 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_378 = _T_374 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] f1pc_in = _T_379 | _T_378; // @[Mux.scala 27:72]
|
wire [30:0] f1pc_in = _T_379 | _T_378; // @[Mux.scala 27:72]
|
||||||
wire _T_333 = _T_337 & _T_357; // @[el2_ifu_aln_ctl.scala 251:50]
|
wire _T_333 = _T_337 & _T_357; // @[el2_ifu_aln_ctl.scala 267:50]
|
||||||
wire fetch_to_f0 = _T_333 & ifvalid; // @[el2_ifu_aln_ctl.scala 251:62]
|
wire fetch_to_f0 = _T_333 & ifvalid; // @[el2_ifu_aln_ctl.scala 267:62]
|
||||||
wire _T_27 = fetch_to_f0 | _T_338; // @[el2_ifu_aln_ctl.scala 142:33]
|
wire _T_27 = fetch_to_f0 | _T_338; // @[el2_ifu_aln_ctl.scala 158:33]
|
||||||
wire _T_28 = _T_27 | _T_353; // @[el2_ifu_aln_ctl.scala 142:47]
|
wire _T_28 = _T_27 | _T_353; // @[el2_ifu_aln_ctl.scala 158:47]
|
||||||
wire _T_29 = _T_28 | shift_2B; // @[el2_ifu_aln_ctl.scala 142:61]
|
wire _T_29 = _T_28 | shift_2B; // @[el2_ifu_aln_ctl.scala 158:61]
|
||||||
wire f0_shift_wr_en = _T_29 | shift_4B; // @[el2_ifu_aln_ctl.scala 142:72]
|
wire f0_shift_wr_en = _T_29 | shift_4B; // @[el2_ifu_aln_ctl.scala 158:72]
|
||||||
wire [30:0] _T_391 = fetch_to_f0 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_391 = fetch_to_f0 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_392 = _T_338 ? f2pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_392 = _T_338 ? f2pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_395 = _T_391 | _T_392; // @[Mux.scala 27:72]
|
wire [30:0] _T_395 = _T_391 | _T_392; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_393 = _T_353 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_393 = _T_353 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_396 = _T_395 | _T_393; // @[Mux.scala 27:72]
|
wire [30:0] _T_396 = _T_395 | _T_393; // @[Mux.scala 27:72]
|
||||||
wire _T_385 = ~fetch_to_f0; // @[el2_ifu_aln_ctl.scala 272:24]
|
wire _T_385 = ~fetch_to_f0; // @[el2_ifu_aln_ctl.scala 288:24]
|
||||||
wire _T_386 = ~_T_338; // @[el2_ifu_aln_ctl.scala 272:39]
|
wire _T_386 = ~_T_338; // @[el2_ifu_aln_ctl.scala 288:39]
|
||||||
wire _T_387 = _T_385 & _T_386; // @[el2_ifu_aln_ctl.scala 272:37]
|
wire _T_387 = _T_385 & _T_386; // @[el2_ifu_aln_ctl.scala 288:37]
|
||||||
wire _T_388 = ~_T_353; // @[el2_ifu_aln_ctl.scala 272:54]
|
wire _T_388 = ~_T_353; // @[el2_ifu_aln_ctl.scala 288:54]
|
||||||
wire _T_389 = _T_387 & _T_388; // @[el2_ifu_aln_ctl.scala 272:52]
|
wire _T_389 = _T_387 & _T_388; // @[el2_ifu_aln_ctl.scala 288:52]
|
||||||
wire [30:0] _T_394 = _T_389 ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_394 = _T_389 ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] f0pc_in = _T_396 | _T_394; // @[Mux.scala 27:72]
|
wire [30:0] f0pc_in = _T_396 | _T_394; // @[Mux.scala 27:72]
|
||||||
wire _T_35 = wrptr == 2'h2; // @[el2_ifu_aln_ctl.scala 145:21]
|
wire _T_35 = wrptr == 2'h2; // @[el2_ifu_aln_ctl.scala 161:21]
|
||||||
wire _T_36 = _T_35 & ifvalid; // @[el2_ifu_aln_ctl.scala 145:29]
|
wire _T_36 = _T_35 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:29]
|
||||||
wire _T_37 = wrptr == 2'h1; // @[el2_ifu_aln_ctl.scala 145:46]
|
wire _T_37 = wrptr == 2'h1; // @[el2_ifu_aln_ctl.scala 161:46]
|
||||||
wire _T_38 = _T_37 & ifvalid; // @[el2_ifu_aln_ctl.scala 145:54]
|
wire _T_38 = _T_37 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:54]
|
||||||
wire _T_39 = wrptr == 2'h0; // @[el2_ifu_aln_ctl.scala 145:71]
|
wire _T_39 = wrptr == 2'h0; // @[el2_ifu_aln_ctl.scala 161:71]
|
||||||
wire _T_40 = _T_39 & ifvalid; // @[el2_ifu_aln_ctl.scala 145:79]
|
wire _T_40 = _T_39 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:79]
|
||||||
wire [2:0] qwen = {_T_36,_T_38,_T_40}; // @[Cat.scala 29:58]
|
wire [2:0] qwen = {_T_36,_T_38,_T_40}; // @[Cat.scala 29:58]
|
||||||
reg [11:0] brdata2; // @[Reg.scala 27:20]
|
reg [11:0] brdata2; // @[Reg.scala 27:20]
|
||||||
wire [5:0] _T_242 = {io_ifu_bp_hist1_f[0],io_ifu_bp_hist0_f[0],io_ifu_bp_pc4_f[0],io_ifu_bp_way_f[0],io_ifu_bp_valid_f[0],io_ifu_bp_ret_f[0]}; // @[Cat.scala 29:58]
|
wire [5:0] _T_242 = {io_ifu_bp_hist1_f[0],io_ifu_bp_hist0_f[0],io_ifu_bp_pc4_f[0],io_ifu_bp_way_f[0],io_ifu_bp_valid_f[0],io_ifu_bp_ret_f[0]}; // @[Cat.scala 29:58]
|
||||||
|
|
@ -734,18 +734,18 @@ module el2_ifu_aln_ctl(
|
||||||
wire [54:0] misc_data_in = {io_iccm_rd_ecc_double_err,io_ic_access_fault_f,io_ic_access_fault_type_f,io_ifu_bp_btb_target_f[31:1],io_ifu_bp_poffset_f,io_ifu_bp_fghr_f}; // @[Cat.scala 29:58]
|
wire [54:0] misc_data_in = {io_iccm_rd_ecc_double_err,io_ic_access_fault_f,io_ic_access_fault_type_f,io_ifu_bp_btb_target_f[31:1],io_ifu_bp_poffset_f,io_ifu_bp_fghr_f}; // @[Cat.scala 29:58]
|
||||||
reg [54:0] _T_16; // @[Reg.scala 27:20]
|
reg [54:0] _T_16; // @[Reg.scala 27:20]
|
||||||
reg [54:0] _T_18; // @[Reg.scala 27:20]
|
reg [54:0] _T_18; // @[Reg.scala 27:20]
|
||||||
wire _T_44 = qren[0] & io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 147:34]
|
wire _T_44 = qren[0] & io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 163:34]
|
||||||
wire _T_46 = _T_44 & _T_1; // @[el2_ifu_aln_ctl.scala 147:55]
|
wire _T_46 = _T_44 & _T_1; // @[el2_ifu_aln_ctl.scala 163:55]
|
||||||
wire _T_49 = qren[1] & io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 148:14]
|
wire _T_49 = qren[1] & io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 164:14]
|
||||||
wire _T_51 = _T_49 & _T_1; // @[el2_ifu_aln_ctl.scala 148:35]
|
wire _T_51 = _T_49 & _T_1; // @[el2_ifu_aln_ctl.scala 164:35]
|
||||||
wire _T_59 = qren[0] & io_ifu_fb_consume2; // @[el2_ifu_aln_ctl.scala 150:14]
|
wire _T_59 = qren[0] & io_ifu_fb_consume2; // @[el2_ifu_aln_ctl.scala 166:14]
|
||||||
wire _T_61 = _T_59 & _T_1; // @[el2_ifu_aln_ctl.scala 150:35]
|
wire _T_61 = _T_59 & _T_1; // @[el2_ifu_aln_ctl.scala 166:35]
|
||||||
wire _T_69 = qren[2] & io_ifu_fb_consume2; // @[el2_ifu_aln_ctl.scala 152:14]
|
wire _T_69 = qren[2] & io_ifu_fb_consume2; // @[el2_ifu_aln_ctl.scala 168:14]
|
||||||
wire _T_71 = _T_69 & _T_1; // @[el2_ifu_aln_ctl.scala 152:35]
|
wire _T_71 = _T_69 & _T_1; // @[el2_ifu_aln_ctl.scala 168:35]
|
||||||
wire _T_73 = ~io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 153:6]
|
wire _T_73 = ~io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 169:6]
|
||||||
wire _T_74 = ~io_ifu_fb_consume2; // @[el2_ifu_aln_ctl.scala 153:28]
|
wire _T_74 = ~io_ifu_fb_consume2; // @[el2_ifu_aln_ctl.scala 169:28]
|
||||||
wire _T_75 = _T_73 & _T_74; // @[el2_ifu_aln_ctl.scala 153:26]
|
wire _T_75 = _T_73 & _T_74; // @[el2_ifu_aln_ctl.scala 169:26]
|
||||||
wire _T_77 = _T_75 & _T_1; // @[el2_ifu_aln_ctl.scala 153:48]
|
wire _T_77 = _T_75 & _T_1; // @[el2_ifu_aln_ctl.scala 169:48]
|
||||||
wire [1:0] _T_80 = _T_51 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_80 = _T_51 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_82 = _T_61 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_82 = _T_61 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_85 = _T_77 ? rdptr : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_85 = _T_77 ? rdptr : 2'h0; // @[Mux.scala 27:72]
|
||||||
|
|
@ -755,57 +755,57 @@ module el2_ifu_aln_ctl(
|
||||||
wire [1:0] _GEN_16 = {{1'd0}, _T_71}; // @[Mux.scala 27:72]
|
wire [1:0] _GEN_16 = {{1'd0}, _T_71}; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_90 = _T_88 | _GEN_16; // @[Mux.scala 27:72]
|
wire [1:0] _T_90 = _T_88 | _GEN_16; // @[Mux.scala 27:72]
|
||||||
wire [1:0] rdptr_in = _T_90 | _T_85; // @[Mux.scala 27:72]
|
wire [1:0] rdptr_in = _T_90 | _T_85; // @[Mux.scala 27:72]
|
||||||
wire _T_95 = qwen[0] & _T_1; // @[el2_ifu_aln_ctl.scala 155:34]
|
wire _T_95 = qwen[0] & _T_1; // @[el2_ifu_aln_ctl.scala 171:34]
|
||||||
wire _T_99 = qwen[1] & _T_1; // @[el2_ifu_aln_ctl.scala 156:14]
|
wire _T_99 = qwen[1] & _T_1; // @[el2_ifu_aln_ctl.scala 172:14]
|
||||||
wire _T_105 = ~ifvalid; // @[el2_ifu_aln_ctl.scala 158:6]
|
wire _T_105 = ~ifvalid; // @[el2_ifu_aln_ctl.scala 174:6]
|
||||||
wire _T_107 = _T_105 & _T_1; // @[el2_ifu_aln_ctl.scala 158:15]
|
wire _T_107 = _T_105 & _T_1; // @[el2_ifu_aln_ctl.scala 174:15]
|
||||||
wire [1:0] _T_110 = _T_99 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_110 = _T_99 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_112 = _T_107 ? wrptr : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_112 = _T_107 ? wrptr : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _GEN_17 = {{1'd0}, _T_95}; // @[Mux.scala 27:72]
|
wire [1:0] _GEN_17 = {{1'd0}, _T_95}; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_113 = _GEN_17 | _T_110; // @[Mux.scala 27:72]
|
wire [1:0] _T_113 = _GEN_17 | _T_110; // @[Mux.scala 27:72]
|
||||||
wire [1:0] wrptr_in = _T_113 | _T_112; // @[Mux.scala 27:72]
|
wire [1:0] wrptr_in = _T_113 | _T_112; // @[Mux.scala 27:72]
|
||||||
wire _T_118 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 160:26]
|
wire _T_118 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 176:26]
|
||||||
wire _T_120 = _T_118 & _T_188; // @[el2_ifu_aln_ctl.scala 160:35]
|
wire _T_120 = _T_118 & _T_188; // @[el2_ifu_aln_ctl.scala 176:35]
|
||||||
wire _T_794 = shift_2B & f0val[0]; // @[Mux.scala 27:72]
|
wire _T_794 = shift_2B & f0val[0]; // @[Mux.scala 27:72]
|
||||||
wire _T_791 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 399:77]
|
wire _T_791 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 415:77]
|
||||||
wire _T_793 = _T_791 & f0val[0]; // @[el2_ifu_aln_ctl.scala 399:87]
|
wire _T_793 = _T_791 & f0val[0]; // @[el2_ifu_aln_ctl.scala 415:87]
|
||||||
wire _T_795 = shift_4B & _T_793; // @[Mux.scala 27:72]
|
wire _T_795 = shift_4B & _T_793; // @[Mux.scala 27:72]
|
||||||
wire f0_shift_2B = _T_794 | _T_795; // @[Mux.scala 27:72]
|
wire f0_shift_2B = _T_794 | _T_795; // @[Mux.scala 27:72]
|
||||||
wire _T_122 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 160:74]
|
wire _T_122 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 176:74]
|
||||||
wire _T_126 = _T_118 & _T_187; // @[el2_ifu_aln_ctl.scala 161:15]
|
wire _T_126 = _T_118 & _T_187; // @[el2_ifu_aln_ctl.scala 177:15]
|
||||||
wire _T_128 = q2off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 161:54]
|
wire _T_128 = q2off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 177:54]
|
||||||
wire _T_132 = _T_118 & _T_186; // @[el2_ifu_aln_ctl.scala 162:15]
|
wire _T_132 = _T_118 & _T_186; // @[el2_ifu_aln_ctl.scala 178:15]
|
||||||
wire _T_134 = _T_120 & _T_122; // @[Mux.scala 27:72]
|
wire _T_134 = _T_120 & _T_122; // @[Mux.scala 27:72]
|
||||||
wire _T_135 = _T_126 & _T_128; // @[Mux.scala 27:72]
|
wire _T_135 = _T_126 & _T_128; // @[Mux.scala 27:72]
|
||||||
wire _T_136 = _T_132 & q2off; // @[Mux.scala 27:72]
|
wire _T_136 = _T_132 & q2off; // @[Mux.scala 27:72]
|
||||||
wire _T_137 = _T_134 | _T_135; // @[Mux.scala 27:72]
|
wire _T_137 = _T_134 | _T_135; // @[Mux.scala 27:72]
|
||||||
wire q2off_in = _T_137 | _T_136; // @[Mux.scala 27:72]
|
wire q2off_in = _T_137 | _T_136; // @[Mux.scala 27:72]
|
||||||
wire _T_141 = ~qwen[1]; // @[el2_ifu_aln_ctl.scala 164:26]
|
wire _T_141 = ~qwen[1]; // @[el2_ifu_aln_ctl.scala 180:26]
|
||||||
wire _T_143 = _T_141 & _T_187; // @[el2_ifu_aln_ctl.scala 164:35]
|
wire _T_143 = _T_141 & _T_187; // @[el2_ifu_aln_ctl.scala 180:35]
|
||||||
wire _T_145 = q1off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 164:74]
|
wire _T_145 = q1off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 180:74]
|
||||||
wire _T_149 = _T_141 & _T_186; // @[el2_ifu_aln_ctl.scala 165:15]
|
wire _T_149 = _T_141 & _T_186; // @[el2_ifu_aln_ctl.scala 181:15]
|
||||||
wire _T_151 = q1off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 165:54]
|
wire _T_151 = q1off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 181:54]
|
||||||
wire _T_155 = _T_141 & _T_188; // @[el2_ifu_aln_ctl.scala 166:15]
|
wire _T_155 = _T_141 & _T_188; // @[el2_ifu_aln_ctl.scala 182:15]
|
||||||
wire _T_157 = _T_143 & _T_145; // @[Mux.scala 27:72]
|
wire _T_157 = _T_143 & _T_145; // @[Mux.scala 27:72]
|
||||||
wire _T_158 = _T_149 & _T_151; // @[Mux.scala 27:72]
|
wire _T_158 = _T_149 & _T_151; // @[Mux.scala 27:72]
|
||||||
wire _T_159 = _T_155 & q1off; // @[Mux.scala 27:72]
|
wire _T_159 = _T_155 & q1off; // @[Mux.scala 27:72]
|
||||||
wire _T_160 = _T_157 | _T_158; // @[Mux.scala 27:72]
|
wire _T_160 = _T_157 | _T_158; // @[Mux.scala 27:72]
|
||||||
wire q1off_in = _T_160 | _T_159; // @[Mux.scala 27:72]
|
wire q1off_in = _T_160 | _T_159; // @[Mux.scala 27:72]
|
||||||
wire _T_164 = ~qwen[0]; // @[el2_ifu_aln_ctl.scala 168:26]
|
wire _T_164 = ~qwen[0]; // @[el2_ifu_aln_ctl.scala 184:26]
|
||||||
wire _T_166 = _T_164 & _T_186; // @[el2_ifu_aln_ctl.scala 168:35]
|
wire _T_166 = _T_164 & _T_186; // @[el2_ifu_aln_ctl.scala 184:35]
|
||||||
wire _T_168 = q0off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 168:76]
|
wire _T_168 = q0off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 184:76]
|
||||||
wire _T_172 = _T_164 & _T_188; // @[el2_ifu_aln_ctl.scala 169:15]
|
wire _T_172 = _T_164 & _T_188; // @[el2_ifu_aln_ctl.scala 185:15]
|
||||||
wire _T_174 = q0off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 169:56]
|
wire _T_174 = q0off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 185:56]
|
||||||
wire _T_178 = _T_164 & _T_187; // @[el2_ifu_aln_ctl.scala 170:15]
|
wire _T_178 = _T_164 & _T_187; // @[el2_ifu_aln_ctl.scala 186:15]
|
||||||
wire _T_180 = _T_166 & _T_168; // @[Mux.scala 27:72]
|
wire _T_180 = _T_166 & _T_168; // @[Mux.scala 27:72]
|
||||||
wire _T_181 = _T_172 & _T_174; // @[Mux.scala 27:72]
|
wire _T_181 = _T_172 & _T_174; // @[Mux.scala 27:72]
|
||||||
wire _T_182 = _T_178 & q0off; // @[Mux.scala 27:72]
|
wire _T_182 = _T_178 & q0off; // @[Mux.scala 27:72]
|
||||||
wire _T_183 = _T_180 | _T_181; // @[Mux.scala 27:72]
|
wire _T_183 = _T_180 | _T_181; // @[Mux.scala 27:72]
|
||||||
wire q0off_in = _T_183 | _T_182; // @[Mux.scala 27:72]
|
wire q0off_in = _T_183 | _T_182; // @[Mux.scala 27:72]
|
||||||
wire [53:0] misc1 = _T_16[53:0]; // @[el2_ifu_aln_ctl.scala 133:9]
|
wire [53:0] misc1 = _T_16[53:0]; // @[el2_ifu_aln_ctl.scala 149:9]
|
||||||
wire [53:0] misc0 = _T_18[53:0]; // @[el2_ifu_aln_ctl.scala 134:9]
|
wire [53:0] misc0 = _T_18[53:0]; // @[el2_ifu_aln_ctl.scala 150:9]
|
||||||
wire [107:0] _T_212 = {misc1,misc0}; // @[Cat.scala 29:58]
|
wire [107:0] _T_212 = {misc1,misc0}; // @[Cat.scala 29:58]
|
||||||
wire [53:0] misc2 = _T_14[53:0]; // @[el2_ifu_aln_ctl.scala 132:9]
|
wire [53:0] misc2 = _T_14[53:0]; // @[el2_ifu_aln_ctl.scala 148:9]
|
||||||
wire [107:0] _T_215 = {misc2,misc1}; // @[Cat.scala 29:58]
|
wire [107:0] _T_215 = {misc2,misc1}; // @[Cat.scala 29:58]
|
||||||
wire [107:0] _T_218 = {misc0,misc2}; // @[Cat.scala 29:58]
|
wire [107:0] _T_218 = {misc0,misc2}; // @[Cat.scala 29:58]
|
||||||
wire [107:0] _T_219 = qren[0] ? _T_212 : 108'h0; // @[Mux.scala 27:72]
|
wire [107:0] _T_219 = qren[0] ? _T_212 : 108'h0; // @[Mux.scala 27:72]
|
||||||
|
|
@ -813,20 +813,20 @@ module el2_ifu_aln_ctl(
|
||||||
wire [107:0] _T_221 = qren[2] ? _T_218 : 108'h0; // @[Mux.scala 27:72]
|
wire [107:0] _T_221 = qren[2] ? _T_218 : 108'h0; // @[Mux.scala 27:72]
|
||||||
wire [107:0] _T_222 = _T_219 | _T_220; // @[Mux.scala 27:72]
|
wire [107:0] _T_222 = _T_219 | _T_220; // @[Mux.scala 27:72]
|
||||||
wire [107:0] misceff = _T_222 | _T_221; // @[Mux.scala 27:72]
|
wire [107:0] misceff = _T_222 | _T_221; // @[Mux.scala 27:72]
|
||||||
wire [52:0] misc1eff = misceff[107:55]; // @[el2_ifu_aln_ctl.scala 189:25]
|
wire [52:0] misc1eff = misceff[107:55]; // @[el2_ifu_aln_ctl.scala 205:25]
|
||||||
wire [54:0] misc0eff = misceff[54:0]; // @[el2_ifu_aln_ctl.scala 190:25]
|
wire [54:0] misc0eff = misceff[54:0]; // @[el2_ifu_aln_ctl.scala 206:25]
|
||||||
wire f1dbecc = misc1eff[52]; // @[el2_ifu_aln_ctl.scala 193:25]
|
wire f1dbecc = misc1eff[52]; // @[el2_ifu_aln_ctl.scala 209:25]
|
||||||
wire f1icaf = misc1eff[51]; // @[el2_ifu_aln_ctl.scala 194:21]
|
wire f1icaf = misc1eff[51]; // @[el2_ifu_aln_ctl.scala 210:21]
|
||||||
wire [1:0] f1ictype = misc1eff[50:49]; // @[el2_ifu_aln_ctl.scala 195:26]
|
wire [1:0] f1ictype = misc1eff[50:49]; // @[el2_ifu_aln_ctl.scala 211:26]
|
||||||
wire [30:0] f1prett = misc1eff[48:18]; // @[el2_ifu_aln_ctl.scala 196:25]
|
wire [30:0] f1prett = misc1eff[48:18]; // @[el2_ifu_aln_ctl.scala 212:25]
|
||||||
wire [11:0] f1poffset = misc1eff[19:8]; // @[el2_ifu_aln_ctl.scala 197:27]
|
wire [11:0] f1poffset = misc1eff[19:8]; // @[el2_ifu_aln_ctl.scala 213:27]
|
||||||
wire [7:0] f1fghr = misc1eff[7:0]; // @[el2_ifu_aln_ctl.scala 198:24]
|
wire [7:0] f1fghr = misc1eff[7:0]; // @[el2_ifu_aln_ctl.scala 214:24]
|
||||||
wire f0dbecc = misc0eff[54]; // @[el2_ifu_aln_ctl.scala 200:25]
|
wire f0dbecc = misc0eff[54]; // @[el2_ifu_aln_ctl.scala 216:25]
|
||||||
wire f0icaf = misc0eff[53]; // @[el2_ifu_aln_ctl.scala 201:21]
|
wire f0icaf = misc0eff[53]; // @[el2_ifu_aln_ctl.scala 217:21]
|
||||||
wire [1:0] f0ictype = misc0eff[52:51]; // @[el2_ifu_aln_ctl.scala 202:26]
|
wire [1:0] f0ictype = misc0eff[52:51]; // @[el2_ifu_aln_ctl.scala 218:26]
|
||||||
wire [30:0] f0prett = misc0eff[50:20]; // @[el2_ifu_aln_ctl.scala 203:25]
|
wire [30:0] f0prett = misc0eff[50:20]; // @[el2_ifu_aln_ctl.scala 219:25]
|
||||||
wire [11:0] f0poffset = misc0eff[19:8]; // @[el2_ifu_aln_ctl.scala 204:27]
|
wire [11:0] f0poffset = misc0eff[19:8]; // @[el2_ifu_aln_ctl.scala 220:27]
|
||||||
wire [7:0] f0fghr = misc0eff[7:0]; // @[el2_ifu_aln_ctl.scala 205:24]
|
wire [7:0] f0fghr = misc0eff[7:0]; // @[el2_ifu_aln_ctl.scala 221:24]
|
||||||
wire [23:0] _T_251 = {brdata1,brdata0}; // @[Cat.scala 29:58]
|
wire [23:0] _T_251 = {brdata1,brdata0}; // @[Cat.scala 29:58]
|
||||||
wire [23:0] _T_254 = {brdata2,brdata1}; // @[Cat.scala 29:58]
|
wire [23:0] _T_254 = {brdata2,brdata1}; // @[Cat.scala 29:58]
|
||||||
wire [23:0] _T_257 = {brdata0,brdata2}; // @[Cat.scala 29:58]
|
wire [23:0] _T_257 = {brdata0,brdata2}; // @[Cat.scala 29:58]
|
||||||
|
|
@ -835,8 +835,8 @@ module el2_ifu_aln_ctl(
|
||||||
wire [23:0] _T_260 = qren[2] ? _T_257 : 24'h0; // @[Mux.scala 27:72]
|
wire [23:0] _T_260 = qren[2] ? _T_257 : 24'h0; // @[Mux.scala 27:72]
|
||||||
wire [23:0] _T_261 = _T_258 | _T_259; // @[Mux.scala 27:72]
|
wire [23:0] _T_261 = _T_258 | _T_259; // @[Mux.scala 27:72]
|
||||||
wire [23:0] brdataeff = _T_261 | _T_260; // @[Mux.scala 27:72]
|
wire [23:0] brdataeff = _T_261 | _T_260; // @[Mux.scala 27:72]
|
||||||
wire [11:0] brdata0eff = brdataeff[11:0]; // @[el2_ifu_aln_ctl.scala 215:43]
|
wire [11:0] brdata0eff = brdataeff[11:0]; // @[el2_ifu_aln_ctl.scala 231:43]
|
||||||
wire [11:0] brdata1eff = brdataeff[23:12]; // @[el2_ifu_aln_ctl.scala 215:61]
|
wire [11:0] brdata1eff = brdataeff[23:12]; // @[el2_ifu_aln_ctl.scala 231:61]
|
||||||
wire [11:0] _T_268 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
|
wire [11:0] _T_268 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
|
||||||
wire [5:0] _T_269 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
|
wire [5:0] _T_269 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
|
||||||
wire [11:0] _GEN_18 = {{6'd0}, _T_269}; // @[Mux.scala 27:72]
|
wire [11:0] _GEN_18 = {{6'd0}, _T_269}; // @[Mux.scala 27:72]
|
||||||
|
|
@ -857,32 +857,32 @@ module el2_ifu_aln_ctl(
|
||||||
wire [1:0] f1pc4 = {brdata1final[9],brdata1final[3]}; // @[Cat.scala 29:58]
|
wire [1:0] f1pc4 = {brdata1final[9],brdata1final[3]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] f1hist0 = {brdata1final[10],brdata1final[4]}; // @[Cat.scala 29:58]
|
wire [1:0] f1hist0 = {brdata1final[10],brdata1final[4]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] f1hist1 = {brdata1final[11],brdata1final[5]}; // @[Cat.scala 29:58]
|
wire [1:0] f1hist1 = {brdata1final[11],brdata1final[5]}; // @[Cat.scala 29:58]
|
||||||
wire consume_fb0 = _T_352 & f0val[0]; // @[el2_ifu_aln_ctl.scala 239:32]
|
wire consume_fb0 = _T_352 & f0val[0]; // @[el2_ifu_aln_ctl.scala 255:32]
|
||||||
wire consume_fb1 = _T_336 & f1val[0]; // @[el2_ifu_aln_ctl.scala 240:32]
|
wire consume_fb1 = _T_336 & f1val[0]; // @[el2_ifu_aln_ctl.scala 256:32]
|
||||||
wire _T_312 = ~consume_fb1; // @[el2_ifu_aln_ctl.scala 242:39]
|
wire _T_312 = ~consume_fb1; // @[el2_ifu_aln_ctl.scala 258:39]
|
||||||
wire _T_313 = consume_fb0 & _T_312; // @[el2_ifu_aln_ctl.scala 242:37]
|
wire _T_313 = consume_fb0 & _T_312; // @[el2_ifu_aln_ctl.scala 258:37]
|
||||||
wire _T_316 = consume_fb0 & consume_fb1; // @[el2_ifu_aln_ctl.scala 243:37]
|
wire _T_316 = consume_fb0 & consume_fb1; // @[el2_ifu_aln_ctl.scala 259:37]
|
||||||
wire _T_400 = fetch_to_f2 & _T_1; // @[el2_ifu_aln_ctl.scala 274:38]
|
wire _T_400 = fetch_to_f2 & _T_1; // @[el2_ifu_aln_ctl.scala 290:38]
|
||||||
wire _T_402 = ~fetch_to_f2; // @[el2_ifu_aln_ctl.scala 275:6]
|
wire _T_402 = ~fetch_to_f2; // @[el2_ifu_aln_ctl.scala 291:6]
|
||||||
wire _T_404 = _T_402 & _T_373; // @[el2_ifu_aln_ctl.scala 275:19]
|
wire _T_404 = _T_402 & _T_373; // @[el2_ifu_aln_ctl.scala 291:19]
|
||||||
wire _T_406 = _T_404 & _T_386; // @[el2_ifu_aln_ctl.scala 275:34]
|
wire _T_406 = _T_404 & _T_386; // @[el2_ifu_aln_ctl.scala 291:34]
|
||||||
wire _T_408 = _T_406 & _T_1; // @[el2_ifu_aln_ctl.scala 275:49]
|
wire _T_408 = _T_406 & _T_1; // @[el2_ifu_aln_ctl.scala 291:49]
|
||||||
wire [1:0] _T_410 = _T_400 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_410 = _T_400 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_411 = _T_408 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_411 = _T_408 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] f2val_in = _T_410 | _T_411; // @[Mux.scala 27:72]
|
wire [1:0] f2val_in = _T_410 | _T_411; // @[Mux.scala 27:72]
|
||||||
wire _T_423 = fetch_to_f1 & _T_1; // @[el2_ifu_aln_ctl.scala 279:38]
|
wire _T_423 = fetch_to_f1 & _T_1; // @[el2_ifu_aln_ctl.scala 295:38]
|
||||||
wire _T_426 = _T_354 & _T_1; // @[el2_ifu_aln_ctl.scala 280:18]
|
wire _T_426 = _T_354 & _T_1; // @[el2_ifu_aln_ctl.scala 296:18]
|
||||||
wire _T_432 = _T_374 & _T_388; // @[el2_ifu_aln_ctl.scala 281:34]
|
wire _T_432 = _T_374 & _T_388; // @[el2_ifu_aln_ctl.scala 297:34]
|
||||||
wire _T_434 = _T_432 & _T_1; // @[el2_ifu_aln_ctl.scala 281:49]
|
wire _T_434 = _T_432 & _T_1; // @[el2_ifu_aln_ctl.scala 297:49]
|
||||||
wire [1:0] _T_436 = _T_423 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_436 = _T_423 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_437 = _T_426 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_437 = _T_426 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_438 = _T_434 ? sf1val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_438 = _T_434 ? sf1val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_439 = _T_436 | _T_437; // @[Mux.scala 27:72]
|
wire [1:0] _T_439 = _T_436 | _T_437; // @[Mux.scala 27:72]
|
||||||
wire [1:0] f1val_in = _T_439 | _T_438; // @[Mux.scala 27:72]
|
wire [1:0] f1val_in = _T_439 | _T_438; // @[Mux.scala 27:72]
|
||||||
wire _T_454 = fetch_to_f0 & _T_1; // @[el2_ifu_aln_ctl.scala 286:38]
|
wire _T_454 = fetch_to_f0 & _T_1; // @[el2_ifu_aln_ctl.scala 302:38]
|
||||||
wire _T_457 = _T_338 & _T_1; // @[el2_ifu_aln_ctl.scala 287:18]
|
wire _T_457 = _T_338 & _T_1; // @[el2_ifu_aln_ctl.scala 303:18]
|
||||||
wire _T_460 = _T_353 & _T_1; // @[el2_ifu_aln_ctl.scala 288:18]
|
wire _T_460 = _T_353 & _T_1; // @[el2_ifu_aln_ctl.scala 304:18]
|
||||||
wire _T_468 = _T_389 & _T_1; // @[el2_ifu_aln_ctl.scala 289:49]
|
wire _T_468 = _T_389 & _T_1; // @[el2_ifu_aln_ctl.scala 305:49]
|
||||||
wire [1:0] _T_470 = _T_454 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_470 = _T_454 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_471 = _T_457 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_471 = _T_457 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_472 = _T_460 ? sf1val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_472 = _T_460 ? sf1val : 2'h0; // @[Mux.scala 27:72]
|
||||||
|
|
@ -933,18 +933,18 @@ module el2_ifu_aln_ctl(
|
||||||
wire [30:0] secondpc = _T_646 | _T_647; // @[Mux.scala 27:72]
|
wire [30:0] secondpc = _T_646 | _T_647; // @[Mux.scala 27:72]
|
||||||
wire _T_656 = first4B & alignval[1]; // @[Mux.scala 27:72]
|
wire _T_656 = first4B & alignval[1]; // @[Mux.scala 27:72]
|
||||||
wire _T_657 = first2B & alignval[0]; // @[Mux.scala 27:72]
|
wire _T_657 = first2B & alignval[0]; // @[Mux.scala 27:72]
|
||||||
wire _T_661 = |alignicaf; // @[el2_ifu_aln_ctl.scala 338:59]
|
wire _T_661 = |alignicaf; // @[el2_ifu_aln_ctl.scala 354:59]
|
||||||
wire _T_664 = first4B & _T_661; // @[Mux.scala 27:72]
|
wire _T_664 = first4B & _T_661; // @[Mux.scala 27:72]
|
||||||
wire _T_665 = first2B & alignicaf[0]; // @[Mux.scala 27:72]
|
wire _T_665 = first2B & alignicaf[0]; // @[Mux.scala 27:72]
|
||||||
wire _T_670 = first4B & _T_514; // @[el2_ifu_aln_ctl.scala 340:39]
|
wire _T_670 = first4B & _T_514; // @[el2_ifu_aln_ctl.scala 356:39]
|
||||||
wire _T_672 = _T_670 & f0val[0]; // @[el2_ifu_aln_ctl.scala 340:51]
|
wire _T_672 = _T_670 & f0val[0]; // @[el2_ifu_aln_ctl.scala 356:51]
|
||||||
wire _T_674 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 340:64]
|
wire _T_674 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 356:64]
|
||||||
wire _T_675 = _T_672 & _T_674; // @[el2_ifu_aln_ctl.scala 340:62]
|
wire _T_675 = _T_672 & _T_674; // @[el2_ifu_aln_ctl.scala 356:62]
|
||||||
wire _T_677 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 340:80]
|
wire _T_677 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 356:80]
|
||||||
wire _T_678 = _T_675 & _T_677; // @[el2_ifu_aln_ctl.scala 340:78]
|
wire _T_678 = _T_675 & _T_677; // @[el2_ifu_aln_ctl.scala 356:78]
|
||||||
wire icaf_eff = alignicaf[1] | aligndbecc[1]; // @[el2_ifu_aln_ctl.scala 342:31]
|
wire icaf_eff = alignicaf[1] | aligndbecc[1]; // @[el2_ifu_aln_ctl.scala 358:31]
|
||||||
wire _T_683 = first4B & icaf_eff; // @[el2_ifu_aln_ctl.scala 344:32]
|
wire _T_683 = first4B & icaf_eff; // @[el2_ifu_aln_ctl.scala 360:32]
|
||||||
wire _T_686 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 346:59]
|
wire _T_686 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 362:59]
|
||||||
wire _T_689 = first4B & _T_686; // @[Mux.scala 27:72]
|
wire _T_689 = first4B & _T_686; // @[Mux.scala 27:72]
|
||||||
wire _T_690 = first2B & aligndbecc[0]; // @[Mux.scala 27:72]
|
wire _T_690 = first2B & aligndbecc[0]; // @[Mux.scala 27:72]
|
||||||
wire [47:0] _T_695 = first4B ? aligndata : 48'h0; // @[Mux.scala 27:72]
|
wire [47:0] _T_695 = first4B ? aligndata : 48'h0; // @[Mux.scala 27:72]
|
||||||
|
|
@ -959,58 +959,58 @@ module el2_ifu_aln_ctl(
|
||||||
wire [4:0] firstbrtag_hash = _T_711 ^ f0pc[23:19]; // @[el2_lib.scala 182:111]
|
wire [4:0] firstbrtag_hash = _T_711 ^ f0pc[23:19]; // @[el2_lib.scala 182:111]
|
||||||
wire [4:0] _T_716 = secondpc[13:9] ^ secondpc[18:14]; // @[el2_lib.scala 182:111]
|
wire [4:0] _T_716 = secondpc[13:9] ^ secondpc[18:14]; // @[el2_lib.scala 182:111]
|
||||||
wire [4:0] secondbrtag_hash = _T_716 ^ secondpc[23:19]; // @[el2_lib.scala 182:111]
|
wire [4:0] secondbrtag_hash = _T_716 ^ secondpc[23:19]; // @[el2_lib.scala 182:111]
|
||||||
wire _T_718 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 362:30]
|
wire _T_718 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:30]
|
||||||
wire _T_720 = first4B & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 362:58]
|
wire _T_720 = first4B & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 378:58]
|
||||||
wire _T_721 = _T_718 | _T_720; // @[el2_ifu_aln_ctl.scala 362:47]
|
wire _T_721 = _T_718 | _T_720; // @[el2_ifu_aln_ctl.scala 378:47]
|
||||||
wire _T_725 = _T_656 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 362:100]
|
wire _T_725 = _T_656 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:100]
|
||||||
wire _T_728 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 364:29]
|
wire _T_728 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 380:29]
|
||||||
wire _T_730 = first4B & alignret[1]; // @[el2_ifu_aln_ctl.scala 364:55]
|
wire _T_730 = first4B & alignret[1]; // @[el2_ifu_aln_ctl.scala 380:55]
|
||||||
wire _T_733 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 366:29]
|
wire _T_733 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 382:29]
|
||||||
wire _T_735 = first4B & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 366:55]
|
wire _T_735 = first4B & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 382:55]
|
||||||
wire i0_brp_pc4 = _T_733 | _T_735; // @[el2_ifu_aln_ctl.scala 366:44]
|
wire i0_brp_pc4 = _T_733 | _T_735; // @[el2_ifu_aln_ctl.scala 382:44]
|
||||||
wire _T_737 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 368:33]
|
wire _T_737 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 384:33]
|
||||||
wire _T_743 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 370:34]
|
wire _T_743 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 386:34]
|
||||||
wire _T_745 = first4B & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 370:62]
|
wire _T_745 = first4B & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 386:62]
|
||||||
wire _T_746 = _T_743 | _T_745; // @[el2_ifu_aln_ctl.scala 370:51]
|
wire _T_746 = _T_743 | _T_745; // @[el2_ifu_aln_ctl.scala 386:51]
|
||||||
wire _T_748 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 371:14]
|
wire _T_748 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 387:14]
|
||||||
wire _T_750 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 371:42]
|
wire _T_750 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 387:42]
|
||||||
wire _T_751 = _T_748 | _T_750; // @[el2_ifu_aln_ctl.scala 371:31]
|
wire _T_751 = _T_748 | _T_750; // @[el2_ifu_aln_ctl.scala 387:31]
|
||||||
wire i0_ends_f1 = first4B & _T_516; // @[el2_ifu_aln_ctl.scala 373:28]
|
wire i0_ends_f1 = first4B & _T_516; // @[el2_ifu_aln_ctl.scala 389:28]
|
||||||
wire _T_767 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 382:42]
|
wire _T_767 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:42]
|
||||||
wire _T_768 = _T_767 & first2B; // @[el2_ifu_aln_ctl.scala 382:56]
|
wire _T_768 = _T_767 & first2B; // @[el2_ifu_aln_ctl.scala 398:56]
|
||||||
wire _T_769 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 382:89]
|
wire _T_769 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:89]
|
||||||
wire _T_770 = io_i0_brp_valid & _T_769; // @[el2_ifu_aln_ctl.scala 382:87]
|
wire _T_770 = io_i0_brp_valid & _T_769; // @[el2_ifu_aln_ctl.scala 398:87]
|
||||||
wire _T_771 = _T_770 & first4B; // @[el2_ifu_aln_ctl.scala 382:101]
|
wire _T_771 = _T_770 & first4B; // @[el2_ifu_aln_ctl.scala 398:101]
|
||||||
wire [7:0] _T_776 = _T_737 ? firstpc_hash : secondpc_hash; // @[el2_ifu_aln_ctl.scala 384:28]
|
wire [7:0] _T_776 = _T_737 ? firstpc_hash : secondpc_hash; // @[el2_ifu_aln_ctl.scala 400:28]
|
||||||
el2_ifu_compress_ctl decompressed ( // @[el2_ifu_aln_ctl.scala 350:28]
|
el2_ifu_compress_ctl decompressed ( // @[el2_ifu_aln_ctl.scala 366:28]
|
||||||
.io_din(decompressed_io_din),
|
.io_din(decompressed_io_din),
|
||||||
.io_dout(decompressed_io_dout)
|
.io_dout(decompressed_io_dout)
|
||||||
);
|
);
|
||||||
assign io_ifu_i0_valid = _T_656 | _T_657; // @[el2_ifu_aln_ctl.scala 336:19]
|
assign io_ifu_i0_valid = _T_656 | _T_657; // @[el2_ifu_aln_ctl.scala 47:19 el2_ifu_aln_ctl.scala 352:19]
|
||||||
assign io_ifu_i0_icaf = _T_664 | _T_665; // @[el2_ifu_aln_ctl.scala 338:18]
|
assign io_ifu_i0_icaf = _T_664 | _T_665; // @[el2_ifu_aln_ctl.scala 48:18 el2_ifu_aln_ctl.scala 354:18]
|
||||||
assign io_ifu_i0_icaf_type = _T_678 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 340:23]
|
assign io_ifu_i0_icaf_type = _T_678 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 49:23 el2_ifu_aln_ctl.scala 356:23]
|
||||||
assign io_ifu_i0_icaf_f1 = _T_683 & _T_516; // @[el2_ifu_aln_ctl.scala 344:21]
|
assign io_ifu_i0_icaf_f1 = _T_683 & _T_516; // @[el2_ifu_aln_ctl.scala 50:21 el2_ifu_aln_ctl.scala 360:21]
|
||||||
assign io_ifu_i0_dbecc = _T_689 | _T_690; // @[el2_ifu_aln_ctl.scala 346:19]
|
assign io_ifu_i0_dbecc = _T_689 | _T_690; // @[el2_ifu_aln_ctl.scala 51:19 el2_ifu_aln_ctl.scala 362:19]
|
||||||
assign io_ifu_i0_instr = _T_697[31:0]; // @[el2_ifu_aln_ctl.scala 352:19]
|
assign io_ifu_i0_instr = _T_697[31:0]; // @[el2_ifu_aln_ctl.scala 52:19 el2_ifu_aln_ctl.scala 368:19]
|
||||||
assign io_ifu_i0_pc = {{1'd0}, f0pc}; // @[el2_ifu_aln_ctl.scala 324:16]
|
assign io_ifu_i0_pc = {{1'd0}, f0pc}; // @[el2_ifu_aln_ctl.scala 53:16 el2_ifu_aln_ctl.scala 340:16]
|
||||||
assign io_ifu_i0_pc4 = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 328:17]
|
assign io_ifu_i0_pc4 = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 54:17 el2_ifu_aln_ctl.scala 344:17]
|
||||||
assign io_ifu_fb_consume1 = _T_313 & _T_1; // @[el2_ifu_aln_ctl.scala 242:22]
|
assign io_ifu_fb_consume1 = _T_313 & _T_1; // @[el2_ifu_aln_ctl.scala 55:22 el2_ifu_aln_ctl.scala 258:22]
|
||||||
assign io_ifu_fb_consume2 = _T_316 & _T_1; // @[el2_ifu_aln_ctl.scala 243:22]
|
assign io_ifu_fb_consume2 = _T_316 & _T_1; // @[el2_ifu_aln_ctl.scala 56:22 el2_ifu_aln_ctl.scala 259:22]
|
||||||
assign io_ifu_i0_bp_index = _T_776[6:0]; // @[el2_ifu_aln_ctl.scala 384:22]
|
assign io_ifu_i0_bp_index = _T_776[6:0]; // @[el2_ifu_aln_ctl.scala 57:22 el2_ifu_aln_ctl.scala 400:22]
|
||||||
assign io_ifu_i0_bp_fghr = i0_ends_f1 ? f1fghr : f0fghr; // @[el2_ifu_aln_ctl.scala 386:21]
|
assign io_ifu_i0_bp_fghr = i0_ends_f1 ? f1fghr : f0fghr; // @[el2_ifu_aln_ctl.scala 58:21 el2_ifu_aln_ctl.scala 402:21]
|
||||||
assign io_ifu_i0_bp_btag = _T_737 ? firstbrtag_hash : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 388:21]
|
assign io_ifu_i0_bp_btag = _T_737 ? firstbrtag_hash : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 59:21 el2_ifu_aln_ctl.scala 404:21]
|
||||||
assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_784; // @[el2_ifu_aln_ctl.scala 394:28]
|
assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_784; // @[el2_ifu_aln_ctl.scala 60:28 el2_ifu_aln_ctl.scala 410:28]
|
||||||
assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 330:19]
|
assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 61:19 el2_ifu_aln_ctl.scala 346:19]
|
||||||
assign io_i0_brp_valid = _T_721 | _T_725; // @[el2_ifu_aln_ctl.scala 362:19]
|
assign io_i0_brp_valid = _T_721 | _T_725; // @[el2_ifu_aln_ctl.scala 378:19]
|
||||||
assign io_i0_brp_toffset = i0_ends_f1 ? f1poffset : f0poffset; // @[el2_ifu_aln_ctl.scala 374:21]
|
assign io_i0_brp_toffset = i0_ends_f1 ? f1poffset : f0poffset; // @[el2_ifu_aln_ctl.scala 390:21]
|
||||||
assign io_i0_brp_hist = {_T_746,_T_751}; // @[el2_ifu_aln_ctl.scala 370:18]
|
assign io_i0_brp_hist = {_T_746,_T_751}; // @[el2_ifu_aln_ctl.scala 386:18]
|
||||||
assign io_i0_brp_br_error = _T_768 | _T_771; // @[el2_ifu_aln_ctl.scala 382:22]
|
assign io_i0_brp_br_error = _T_768 | _T_771; // @[el2_ifu_aln_ctl.scala 398:22]
|
||||||
assign io_i0_brp_br_start_error = _T_656 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:29]
|
assign io_i0_brp_br_start_error = _T_656 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 394:29]
|
||||||
assign io_i0_brp_bank = _T_737 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 380:29]
|
assign io_i0_brp_bank = _T_737 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 396:29]
|
||||||
assign io_i0_brp_prett = i0_ends_f1 ? f1prett : f0prett; // @[el2_ifu_aln_ctl.scala 376:19]
|
assign io_i0_brp_prett = i0_ends_f1 ? f1prett : f0prett; // @[el2_ifu_aln_ctl.scala 392:19]
|
||||||
assign io_i0_brp_way = _T_737 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 368:17]
|
assign io_i0_brp_way = _T_737 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 384:17]
|
||||||
assign io_i0_brp_ret = _T_728 | _T_730; // @[el2_ifu_aln_ctl.scala 364:17]
|
assign io_i0_brp_ret = _T_728 | _T_730; // @[el2_ifu_aln_ctl.scala 380:17]
|
||||||
assign decompressed_io_din = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 390:23]
|
assign decompressed_io_din = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 406:23]
|
||||||
`ifdef RANDOMIZE_GARBAGE_ASSIGN
|
`ifdef RANDOMIZE_GARBAGE_ASSIGN
|
||||||
`define RANDOMIZE
|
`define RANDOMIZE
|
||||||
`endif
|
`endif
|
||||||
|
|
|
||||||
|
|
@ -26,6 +26,7 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
|
||||||
val ifu_fetch_data_f = Input(UInt(32.W))
|
val ifu_fetch_data_f = Input(UInt(32.W))
|
||||||
val ifu_fetch_val = Input(UInt(2.W))
|
val ifu_fetch_val = Input(UInt(2.W))
|
||||||
val ifu_fetch_pc = Input(UInt(31.W))
|
val ifu_fetch_pc = Input(UInt(31.W))
|
||||||
|
/////////////////////////////////////////////////
|
||||||
val ifu_i0_valid = Output(Bool())
|
val ifu_i0_valid = Output(Bool())
|
||||||
val ifu_i0_icaf = Output(Bool())
|
val ifu_i0_icaf = Output(Bool())
|
||||||
val ifu_i0_icaf_type = Output(UInt(2.W))
|
val ifu_i0_icaf_type = Output(UInt(2.W))
|
||||||
|
|
@ -43,6 +44,21 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
|
||||||
val ifu_i0_cinst = Output(UInt(16.W))
|
val ifu_i0_cinst = Output(UInt(16.W))
|
||||||
val i0_brp = Output(new el2_br_pkt_t)
|
val i0_brp = Output(new el2_br_pkt_t)
|
||||||
})
|
})
|
||||||
|
io.ifu_i0_valid := 0.U
|
||||||
|
io.ifu_i0_icaf := 0.U
|
||||||
|
io.ifu_i0_icaf_type := 0.U
|
||||||
|
io.ifu_i0_icaf_f1 := 0.U
|
||||||
|
io.ifu_i0_dbecc := 0.U
|
||||||
|
io.ifu_i0_instr := 0.U
|
||||||
|
io.ifu_i0_pc := 0.U
|
||||||
|
io.ifu_i0_pc4 := 0.U
|
||||||
|
io.ifu_fb_consume1 := 0.U
|
||||||
|
io.ifu_fb_consume2 := 0.U
|
||||||
|
io.ifu_i0_bp_index := 0.U
|
||||||
|
io.ifu_i0_bp_fghr := 0.U
|
||||||
|
io.ifu_i0_bp_btag := 0.U
|
||||||
|
io.ifu_pmu_instr_aligned := 0.U
|
||||||
|
io.ifu_i0_cinst := 0.U
|
||||||
val MHI = 46+BHT_GHR_SIZE // 54
|
val MHI = 46+BHT_GHR_SIZE // 54
|
||||||
val MSIZE = 47+BHT_GHR_SIZE // 55
|
val MSIZE = 47+BHT_GHR_SIZE // 55
|
||||||
val BRDATA_SIZE = 12
|
val BRDATA_SIZE = 12
|
||||||
|
|
|
||||||
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Reference in New Issue