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lsu update

This commit is contained in:
​Laraib Khan 2020-11-18 16:14:53 +05:00
parent 2afae08254
commit 2b59a630d6
1 changed files with 1 additions and 1 deletions
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2
src/main/scala/lsu/el2_lsu_ecc.scala
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@ -19,7 +19,7 @@ class el2_lsu_ecc extends Module with el2_lib with RequireAsyncReset {
val lsu_addr_r = Input(UInt(DCCM_BITS.W)) val lsu_addr_r = Input(UInt(DCCM_BITS.W))
val end_addr_r = Input(UInt(DCCM_BITS.W)) val end_addr_r = Input(UInt(DCCM_BITS.W))
val lsu_addr_m = Input(UInt(DCCM_BITS.W)) val lsu_addr_m = Input(UInt(DCCM_BITS.W))//6fba5e03053441e71b7d54f50a77e3b496d56173
val end_addr_m = Input(UInt(DCCM_BITS.W)) val end_addr_m = Input(UInt(DCCM_BITS.W))
val dccm_rdata_hi_r = Input(UInt(DCCM_DATA_WIDTH.W)) val dccm_rdata_hi_r = Input(UInt(DCCM_DATA_WIDTH.W))