Hard-coded values

el2_ifu_iccm_mem.fir

@@ -570,15 +570,17 @@ circuit el2_ifu_iccm_mem :
     node _T_427 = or(_T_426, _T_424) @[Mux.scala 27:72]
     wire _T_428 : UInt<39> @[Mux.scala 27:72]
     _T_428 <= _T_427 @[Mux.scala 27:72]
-    node _T_429 = bits(iccm_rd_addr_lo_q, 1, 1) @[el2_ifu_iccm_mem.scala 110:48]
+    node _T_429 = bits(iccm_rd_addr_lo_q, 1, 1) @[el2_ifu_iccm_mem.scala 110:49]
-    node _T_430 = eq(_T_429, UInt<1>("h00")) @[el2_ifu_iccm_mem.scala 110:64]
+    node _T_430 = eq(_T_429, UInt<1>("h00")) @[el2_ifu_iccm_mem.scala 110:31]
-    node _T_431 = bits(iccm_rd_addr_lo_q, 1, 1) @[el2_ifu_iccm_mem.scala 110:48]
+    node _T_431 = eq(_T_430, UInt<1>("h00")) @[el2_ifu_iccm_mem.scala 110:65]
-    node _T_432 = eq(_T_431, UInt<1>("h01")) @[el2_ifu_iccm_mem.scala 110:64]
+    node _T_432 = bits(iccm_rd_addr_lo_q, 1, 1) @[el2_ifu_iccm_mem.scala 110:49]
-    node _T_433 = mux(_T_430, iccm_bank_dout_fn_2, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_433 = eq(_T_432, UInt<1>("h00")) @[el2_ifu_iccm_mem.scala 110:31]
-    node _T_434 = mux(_T_432, iccm_bank_dout_fn_3, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_434 = eq(_T_433, UInt<1>("h01")) @[el2_ifu_iccm_mem.scala 110:65]
-    node _T_435 = or(_T_433, _T_434) @[Mux.scala 27:72]
+    node _T_435 = mux(_T_431, iccm_bank_dout_fn_2, UInt<1>("h00")) @[Mux.scala 27:72]
-    wire _T_436 : UInt<39> @[Mux.scala 27:72]
+    node _T_436 = mux(_T_434, iccm_bank_dout_fn_3, UInt<1>("h00")) @[Mux.scala 27:72]
-    _T_436 <= _T_435 @[Mux.scala 27:72]
+    node _T_437 = or(_T_435, _T_436) @[Mux.scala 27:72]
-    node _T_437 = cat(_T_428, _T_436) @[Cat.scala 29:58]
+    wire _T_438 : UInt<39> @[Mux.scala 27:72]
-    io.iccm_rd_data_ecc <= _T_437 @[el2_ifu_iccm_mem.scala 109:23]
+    _T_438 <= _T_437 @[Mux.scala 27:72]
+    node _T_439 = cat(_T_428, _T_438) @[Cat.scala 29:58]
+    io.iccm_rd_data_ecc <= _T_439 @[el2_ifu_iccm_mem.scala 109:23]
     

el2_ifu_iccm_mem.v

@@ -270,10 +270,11 @@ module el2_ifu_iccm_mem(
   wire [38:0] _T_425 = _T_421 | _T_422; // @[Mux.scala 27:72]
   wire [38:0] _T_426 = _T_425 | _T_423; // @[Mux.scala 27:72]
   wire [38:0] _T_427 = _T_426 | _T_424; // @[Mux.scala 27:72]
-  wire  _T_430 = ~iccm_rd_addr_lo_q[1]; // @[el2_ifu_iccm_mem.scala 110:64]
+  wire  _T_430 = ~iccm_rd_addr_lo_q[1]; // @[el2_ifu_iccm_mem.scala 110:31]
-  wire [38:0] _T_433 = _T_430 ? iccm_bank_dout_fn_2 : 39'h0; // @[Mux.scala 27:72]
+  wire  _T_431 = ~_T_430; // @[el2_ifu_iccm_mem.scala 110:65]
-  wire [38:0] _T_434 = iccm_rd_addr_lo_q[1] ? iccm_bank_dout_fn_3 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_435 = _T_431 ? iccm_bank_dout_fn_2 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_435 = _T_433 | _T_434; // @[Mux.scala 27:72]
+  wire [38:0] _T_436 = _T_430 ? iccm_bank_dout_fn_3 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_437 = _T_435 | _T_436; // @[Mux.scala 27:72]
   assign _T_85__T_105_addr = _T_85__T_105_addr_pipe_0;
   assign _T_85__T_105_data = _T_85[_T_85__T_105_addr]; // @[el2_ifu_iccm_mem.scala 43:59]
   assign _T_85__T_101_data = io_iccm_wr_data[38:0];
@@ -299,7 +300,7 @@ module el2_ifu_iccm_mem(
   assign _T_88__T_104_mask = 1'h1;
   assign _T_88__T_104_en = iccm_clken_3 & wren_bank_3;
   assign io_iccm_rd_data = iccm_rd_addr_lo_q[0] ? _T_415 : iccm_rd_data_pre; // @[el2_ifu_iccm_mem.scala 22:19 el2_ifu_iccm_mem.scala 108:19]
-  assign io_iccm_rd_data_ecc = {_T_427,_T_435}; // @[el2_ifu_iccm_mem.scala 23:23 el2_ifu_iccm_mem.scala 109:23]
+  assign io_iccm_rd_data_ecc = {_T_427,_T_437}; // @[el2_ifu_iccm_mem.scala 23:23 el2_ifu_iccm_mem.scala 109:23]
 `ifdef RANDOMIZE_GARBAGE_ASSIGN
 `define RANDOMIZE
 `endif

src/main/scala/ifu/el2_ifu_iccm_mem.scala

@@ -107,7 +107,7 @@ class el2_ifu_iccm_mem extends Module with el2_lib {
 
   io.iccm_rd_data := Mux(iccm_rd_addr_lo_q(0).asBool(),Cat(Fill(16,0.U),iccm_rd_data_pre(63,16)) ,iccm_rd_data_pre)
   io.iccm_rd_data_ecc :=Cat(Mux1H((0 until ICCM_NUM_BANKS).map(i=>(iccm_rd_addr_hi_q===i.U)->iccm_bank_dout_fn(i))),
-    Mux1H((0 until 2).map(i=>(iccm_rd_addr_lo_q(ICCM_BANK_HI-2)===i.U)->iccm_bank_dout_fn(i+2))))
+    Mux1H((0 until 2).map(i=>(!iccm_rd_addr_lo_q(ICCM_BANK_HI-2)===i.U)->iccm_bank_dout_fn(i+2))))
 }