mem reset corrected

This commit is contained in:
​Laraib Khan 2021-02-22 14:05:35 +05:00
parent 904ac0263f
commit 5509edc39d
6 changed files with 49007 additions and 3436 deletions

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -75,7 +75,7 @@ val BHT_ADDR_HI = 0x09
val DCCM_WIDTH_BITS = 0x02
val DIV_BIT = 0x04
val DIV_NEW = 0x01
val DMA_BUF_DEPTH = 0x05
val DMA_BUF_DEPTH = 0x05a
val DMA_BUS_ID = 0x001
val DMA_BUS_PRTY = 0x02
val DMA_BUS_TAG = 0x01

View File

@ -64,6 +64,7 @@ class quasar_wrapper extends Module with lib with RequireAsyncReset {
val scan_mode = Input(Bool())
})
// val core_rst_l = core.io.core_rst_l
val mem = Module(new quasar.mem())
val dmi_wrapper = Module(new dmi_wrapper())
val core = Module(new quasar())
@ -88,7 +89,7 @@ class quasar_wrapper extends Module with lib with RequireAsyncReset {
mem.io.icm_clk_override := core.io.icm_clk_override
mem.io.dec_tlu_core_ecc_disable := core.io.dec_tlu_core_ecc_disable
mem.io.dccm <> core.io.dccm
mem.io.rst_l := reset
mem.io.rst_l := core.io.core_rst_l
mem.io.clk := core.io.active_l2clk
mem.io.scan_mode := io.scan_mode
mem.io.dccm_ext_in_pkt := io.dccm_ext_in_pkt
@ -150,7 +151,6 @@ class quasar_wrapper extends Module with lib with RequireAsyncReset {
// Outputs
val core_rst_l = core.io.core_rst_l
io.rv_trace_pkt <> core.io.rv_trace_pkt
// external halt/run interface