bus buffer with buf_nextstate in resp updated
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lsu_bus_buffer.fir
6324
lsu_bus_buffer.fir
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2270
lsu_bus_buffer.v
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lsu_bus_buffer.v
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@ -374,14 +374,14 @@ trait lib extends param{
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object rvdff_fpga {
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def apply(din: UInt, clk: Clock, clken: Bool,rawclk:Clock):UInt = {
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if (RV_FPGA_OPTIMIZE)
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withClock(rawclk) {RegEnable (din, 0.U, clken)}
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withClock(clk) {RegEnable (din, 0.U, clken)}
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else RegNext (din, 0.U)
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}
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}
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object rvdffs_fpga {
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def apply(din: UInt, en:Bool,clk: Clock, clken: Bool,rawclk:Clock):UInt = {
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if (RV_FPGA_OPTIMIZE)
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withClock (rawclk) {RegEnable (din, 0.U, (clken & en))}
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withClock (clk) {RegEnable (din, 0.U, (clken & en))}
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else RegEnable (din, 0.U,en)
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}
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}
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@ -353,6 +353,7 @@ class lsu_bus_buffer extends Module with RequireAsyncReset with lib {
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obuf_cmd_done := rvdff_fpga (obuf_cmd_done_in,io.lsu_busm_clk,io.lsu_busm_clken,clock)
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obuf_data_done := rvdff_fpga (obuf_data_done_in,io.lsu_busm_clk,io.lsu_busm_clken,clock)
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obuf_rdrsp_tag := rvdff_fpga (obuf_rdrsp_tag_in,io.lsu_busm_clk,io.lsu_busm_clken,clock)
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obuf_tag0 := rvdffs_fpga (obuf_tag0_in,obuf_wr_en,io.lsu_bus_obuf_c1_clk,io.lsu_bus_obuf_c1_clken,clock)
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val obuf_tag1 = rvdffs_fpga (obuf_tag1_in,obuf_wr_en,io.lsu_bus_obuf_c1_clk,io.lsu_bus_obuf_c1_clken,clock)
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val obuf_merge = rvdffs_fpga (obuf_merge_in,obuf_wr_en,io.lsu_bus_obuf_c1_clk,io.lsu_bus_obuf_c1_clken,clock)
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@ -479,7 +480,7 @@ class lsu_bus_buffer extends Module with RequireAsyncReset with lib {
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buf_state_bus_en(i) := buf_resp_state_bus_en(i)
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buf_state_en(i) := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
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buf_data_en(i) := buf_state_bus_en(i) & bus_rsp_read & io.lsu_bus_clk_en
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buf_error_en(i) := buf_state_bus_en(i) & io.lsu_bus_clk_en & ((bus_rsp_read_error & (bus_rsp_read_tag === (i.asUInt(LSU_BUS_TAG.W)))) |
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buf_error_en(i) := buf_state_bus_en(i) & io.lsu_bus_clk_en & ((bus_rsp_read_error & (bus_rsp_read_tag === (i.asUInt(LSU_BUS_TAG.W)))) |
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(bus_rsp_read_error & buf_ldfwd(i) & (bus_rsp_read_tag === buf_ldfwdtag(i))) |
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(bus_rsp_write_error & (bus_rsp_write_tag === i.asUInt(LSU_BUS_TAG.W))))
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buf_data_in(i) := Mux((buf_state_en(i) & !buf_error_en(i)), Mux(buf_addr(i)(2), bus_rsp_rdata(63, 32), bus_rsp_rdata(31, 0)), bus_rsp_rdata(31, 0))
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