Add clk output for led.

This commit is contained in:
colin 2022-03-11 03:05:36 +00:00
parent 0948bc9cfa
commit 85b5ac0f8b
1 changed files with 18 additions and 10 deletions

View File

@ -6,7 +6,8 @@ module soc_top (
input jtag_tck,
input jtag_tms,
input jtag_tdi,
input jtag_trst_n
input jtag_trst_n,
output clk_o
);
logic nmi_int;
@ -301,6 +302,13 @@ module soc_top (
nmi_int = 0;
end
localparam WIDTH = $clog2(25_000_000);
reg [WIDTH-1:0] clk_count;
assign clk_o = clk_count[WIDTH-1];
always @(posedge clk) begin
clk_count <= clk_count + 1'b1;
end
//=========================================================================-
// RTL instance
//=========================================================================-