Hard-coded values

el2_ifu_iccm_mem.fir

@@ -595,38 +595,46 @@ circuit el2_ifu_iccm_mem :
     io.iccm_rd_data_ecc <= _T_449 @[el2_ifu_iccm_mem.scala 109:23]
     node _T_450 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 111:86]
     node _T_451 = eq(_T_450, UInt<1>("h00")) @[el2_ifu_iccm_mem.scala 111:104]
-    node _T_452 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 111:86]
-    node _T_453 = eq(_T_452, UInt<1>("h01")) @[el2_ifu_iccm_mem.scala 111:104]
-    node _T_454 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 111:86]
-    node _T_455 = eq(_T_454, UInt<2>("h02")) @[el2_ifu_iccm_mem.scala 111:104]
+    node _T_452 = bits(iccm_bank_dout_fn_1, 38, 0) @[el2_ifu_iccm_mem.scala 111:151]
+    node _T_453 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 111:86]
+    node _T_454 = eq(_T_453, UInt<1>("h01")) @[el2_ifu_iccm_mem.scala 111:104]
+    node _T_455 = bits(iccm_bank_dout_fn_2, 38, 0) @[el2_ifu_iccm_mem.scala 111:151]
     node _T_456 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 111:86]
-    node _T_457 = eq(_T_456, UInt<2>("h03")) @[el2_ifu_iccm_mem.scala 111:104]
-    node _T_458 = mux(_T_451, iccm_bank_dout_fn_1, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_459 = mux(_T_453, iccm_bank_dout_fn_2, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_460 = mux(_T_455, iccm_bank_dout_fn_3, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_461 = mux(_T_457, iccm_bank_dout_fn_0, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_462 = or(_T_458, _T_459) @[Mux.scala 27:72]
-    node _T_463 = or(_T_462, _T_460) @[Mux.scala 27:72]
-    node _T_464 = or(_T_463, _T_461) @[Mux.scala 27:72]
-    wire _T_465 : UInt<39> @[Mux.scala 27:72]
-    _T_465 <= _T_464 @[Mux.scala 27:72]
-    node _T_466 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 112:61]
-    node _T_467 = eq(_T_466, UInt<1>("h00")) @[el2_ifu_iccm_mem.scala 112:79]
-    node _T_468 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 112:61]
-    node _T_469 = eq(_T_468, UInt<1>("h01")) @[el2_ifu_iccm_mem.scala 112:79]
+    node _T_457 = eq(_T_456, UInt<2>("h02")) @[el2_ifu_iccm_mem.scala 111:104]
+    node _T_458 = bits(iccm_bank_dout_fn_3, 38, 0) @[el2_ifu_iccm_mem.scala 111:151]
+    node _T_459 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 111:86]
+    node _T_460 = eq(_T_459, UInt<2>("h03")) @[el2_ifu_iccm_mem.scala 111:104]
+    node _T_461 = bits(iccm_bank_dout_fn_0, 38, 0) @[el2_ifu_iccm_mem.scala 111:151]
+    node _T_462 = mux(_T_451, _T_452, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_463 = mux(_T_454, _T_455, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_464 = mux(_T_457, _T_458, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_465 = mux(_T_460, _T_461, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_466 = or(_T_462, _T_463) @[Mux.scala 27:72]
+    node _T_467 = or(_T_466, _T_464) @[Mux.scala 27:72]
+    node _T_468 = or(_T_467, _T_465) @[Mux.scala 27:72]
+    wire _T_469 : UInt<39> @[Mux.scala 27:72]
+    _T_469 <= _T_468 @[Mux.scala 27:72]
     node _T_470 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 112:61]
-    node _T_471 = eq(_T_470, UInt<2>("h02")) @[el2_ifu_iccm_mem.scala 112:79]
-    node _T_472 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 112:61]
-    node _T_473 = eq(_T_472, UInt<2>("h03")) @[el2_ifu_iccm_mem.scala 112:79]
-    node _T_474 = mux(_T_467, iccm_bank_dout_fn_0, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_475 = mux(_T_469, iccm_bank_dout_fn_1, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_476 = mux(_T_471, iccm_bank_dout_fn_2, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_477 = mux(_T_473, iccm_bank_dout_fn_3, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_478 = or(_T_474, _T_475) @[Mux.scala 27:72]
-    node _T_479 = or(_T_478, _T_476) @[Mux.scala 27:72]
-    node _T_480 = or(_T_479, _T_477) @[Mux.scala 27:72]
-    wire _T_481 : UInt<39> @[Mux.scala 27:72]
-    _T_481 <= _T_480 @[Mux.scala 27:72]
-    node _T_482 = cat(_T_465, _T_481) @[Cat.scala 29:58]
-    io.iccm_rd_data_ecc <= _T_482 @[el2_ifu_iccm_mem.scala 111:23]
+    node _T_471 = eq(_T_470, UInt<1>("h00")) @[el2_ifu_iccm_mem.scala 112:79]
+    node _T_472 = bits(iccm_bank_dout_fn_0, 38, 0) @[el2_ifu_iccm_mem.scala 112:108]
+    node _T_473 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 112:61]
+    node _T_474 = eq(_T_473, UInt<1>("h01")) @[el2_ifu_iccm_mem.scala 112:79]
+    node _T_475 = bits(iccm_bank_dout_fn_1, 38, 0) @[el2_ifu_iccm_mem.scala 112:108]
+    node _T_476 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 112:61]
+    node _T_477 = eq(_T_476, UInt<2>("h02")) @[el2_ifu_iccm_mem.scala 112:79]
+    node _T_478 = bits(iccm_bank_dout_fn_2, 38, 0) @[el2_ifu_iccm_mem.scala 112:108]
+    node _T_479 = bits(iccm_rd_addr_lo_q, 2, 1) @[el2_ifu_iccm_mem.scala 112:61]
+    node _T_480 = eq(_T_479, UInt<2>("h03")) @[el2_ifu_iccm_mem.scala 112:79]
+    node _T_481 = bits(iccm_bank_dout_fn_3, 38, 0) @[el2_ifu_iccm_mem.scala 112:108]
+    node _T_482 = mux(_T_471, _T_472, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_483 = mux(_T_474, _T_475, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_484 = mux(_T_477, _T_478, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_485 = mux(_T_480, _T_481, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_486 = or(_T_482, _T_483) @[Mux.scala 27:72]
+    node _T_487 = or(_T_486, _T_484) @[Mux.scala 27:72]
+    node _T_488 = or(_T_487, _T_485) @[Mux.scala 27:72]
+    wire _T_489 : UInt<39> @[Mux.scala 27:72]
+    _T_489 <= _T_488 @[Mux.scala 27:72]
+    node _T_490 = cat(_T_469, _T_489) @[Cat.scala 29:58]
+    io.iccm_rd_data_ecc <= _T_490 @[el2_ifu_iccm_mem.scala 111:23]
     

el2_ifu_iccm_mem.v

@@ -257,20 +257,20 @@ module el2_ifu_iccm_mem(
   wire [31:0] _T_413 = _T_412 | _T_410; // @[Mux.scala 27:72]
   wire [63:0] iccm_rd_data_pre = {_T_393,_T_413}; // @[Cat.scala 29:58]
   wire [63:0] _T_419 = {16'h0,iccm_rd_data_pre[63:16]}; // @[Cat.scala 29:58]
-  wire [38:0] _T_458 = _T_376 ? iccm_bank_dout_fn_1 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_459 = _T_379 ? iccm_bank_dout_fn_2 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_460 = _T_382 ? iccm_bank_dout_fn_3 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_461 = _T_385 ? iccm_bank_dout_fn_0 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_462 = _T_458 | _T_459; // @[Mux.scala 27:72]
-  wire [38:0] _T_463 = _T_462 | _T_460; // @[Mux.scala 27:72]
-  wire [38:0] _T_464 = _T_463 | _T_461; // @[Mux.scala 27:72]
-  wire [38:0] _T_474 = _T_376 ? iccm_bank_dout_fn_0 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_475 = _T_379 ? iccm_bank_dout_fn_1 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_476 = _T_382 ? iccm_bank_dout_fn_2 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_477 = _T_385 ? iccm_bank_dout_fn_3 : 39'h0; // @[Mux.scala 27:72]
-  wire [38:0] _T_478 = _T_474 | _T_475; // @[Mux.scala 27:72]
-  wire [38:0] _T_479 = _T_478 | _T_476; // @[Mux.scala 27:72]
-  wire [38:0] _T_480 = _T_479 | _T_477; // @[Mux.scala 27:72]
+  wire [38:0] _T_462 = _T_376 ? iccm_bank_dout_fn_1 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_463 = _T_379 ? iccm_bank_dout_fn_2 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_464 = _T_382 ? iccm_bank_dout_fn_3 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_465 = _T_385 ? iccm_bank_dout_fn_0 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_466 = _T_462 | _T_463; // @[Mux.scala 27:72]
+  wire [38:0] _T_467 = _T_466 | _T_464; // @[Mux.scala 27:72]
+  wire [38:0] _T_468 = _T_467 | _T_465; // @[Mux.scala 27:72]
+  wire [38:0] _T_482 = _T_376 ? iccm_bank_dout_fn_0 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_483 = _T_379 ? iccm_bank_dout_fn_1 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_484 = _T_382 ? iccm_bank_dout_fn_2 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_485 = _T_385 ? iccm_bank_dout_fn_3 : 39'h0; // @[Mux.scala 27:72]
+  wire [38:0] _T_486 = _T_482 | _T_483; // @[Mux.scala 27:72]
+  wire [38:0] _T_487 = _T_486 | _T_484; // @[Mux.scala 27:72]
+  wire [38:0] _T_488 = _T_487 | _T_485; // @[Mux.scala 27:72]
   assign _T_85__T_105_addr = _T_85__T_105_addr_pipe_0;
   assign _T_85__T_105_data = _T_85[_T_85__T_105_addr]; // @[el2_ifu_iccm_mem.scala 43:59]
   assign _T_85__T_101_data = io_iccm_wr_data[38:0];
@@ -296,7 +296,7 @@ module el2_ifu_iccm_mem(
   assign _T_88__T_104_mask = 1'h1;
   assign _T_88__T_104_en = iccm_clken_3 & wren_bank_3;
   assign io_iccm_rd_data = iccm_rd_addr_lo_q[0] ? _T_419 : iccm_rd_data_pre; // @[el2_ifu_iccm_mem.scala 22:19 el2_ifu_iccm_mem.scala 108:19]
-  assign io_iccm_rd_data_ecc = {_T_464,_T_480}; // @[el2_ifu_iccm_mem.scala 23:23 el2_ifu_iccm_mem.scala 109:23 el2_ifu_iccm_mem.scala 111:23]
+  assign io_iccm_rd_data_ecc = {_T_468,_T_488}; // @[el2_ifu_iccm_mem.scala 23:23 el2_ifu_iccm_mem.scala 109:23 el2_ifu_iccm_mem.scala 111:23]
 `ifdef RANDOMIZE_GARBAGE_ASSIGN
 `define RANDOMIZE
 `endif

src/main/scala/ifu/el2_ifu_iccm_mem.scala

@@ -108,8 +108,8 @@ class el2_ifu_iccm_mem extends Module with el2_lib {
   io.iccm_rd_data := Mux(iccm_rd_addr_lo_q(0).asBool(),Cat(Fill(16,0.U),iccm_rd_data_pre(63,16)) ,iccm_rd_data_pre)
   io.iccm_rd_data_ecc :=Cat(Mux1H((0 until ICCM_NUM_BANKS).map(i=>(iccm_rd_addr_hi_q===i.U)->iccm_bank_dout_fn(i))),
     Mux1H((0 until ICCM_NUM_BANKS).map(i=>(iccm_rd_addr_lo_q(ICCM_BANK_HI-2,0)===i.U)->iccm_bank_dout_fn(i))))
-  io.iccm_rd_data_ecc := Cat(Mux1H((0 until ICCM_NUM_BANKS).map(i=>(iccm_rd_addr_lo_q(ICCM_BANK_HI-1,1)===i.U)->iccm_bank_dout_fn(if(i==3) 0 else i+1))),
-    Mux1H((0 until ICCM_NUM_BANKS).map(i=>(iccm_rd_addr_lo_q(ICCM_BANK_HI-1,1)===i.U)->iccm_bank_dout_fn(i))))
+  io.iccm_rd_data_ecc := Cat(Mux1H((0 until ICCM_NUM_BANKS).map(i=>(iccm_rd_addr_lo_q(ICCM_BANK_HI-1,1)===i.U)->iccm_bank_dout_fn(if(i==3) 0 else i+1)(38,0))),
+    Mux1H((0 until ICCM_NUM_BANKS).map(i=>(iccm_rd_addr_lo_q(ICCM_BANK_HI-1,1)===i.U)->iccm_bank_dout_fn(i)(38,0))))
 }