Memory connection updated

This commit is contained in:
​Laraib Khan 2021-02-24 16:55:17 +05:00
parent 11695f3916
commit b40ab3459c
53 changed files with 693 additions and 13 deletions

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@ -51,7 +51,7 @@ module mem
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RM_3, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RM_3,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_LS, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_LS,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_DS, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_DS,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_SD, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_SD,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RNM, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RNM,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC1, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC1,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC2, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC2,

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@ -51,7 +51,7 @@ module mem
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RM_3, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RM_3,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_LS, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_LS,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_DS, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_DS,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_SD, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_SD,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RNM, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RNM,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC1, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC1,
input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC2, input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC2,

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@ -1 +1 @@
["lsu.buffer","lsu.bus_intf","lsu.clkdomain","lsu.dccm_ctl","lsu.lsc_ctl","lsu.lsu_main","lsu.stbuf"] ["DMA","QUASAR","QUASAR_Wrp","dbg.debug","dec.dec_dec","dec.dec_main","dec.tlu","exu.div_main","exu.exu_main","exu.mul","ifu.ifu_top","lib.axi4_to_ahb","lsu.buffer","lsu.bus_intf","lsu.clkdomain","lsu.dccm_ctl","lsu.lsc_ctl","lsu.lsu_main","lsu.stbuf","pic"]

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@ -1,2 +1,10 @@
[warn] there were 337 feature warnings; re-run with -feature for details [warn] /home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lib/lib.scala:25:5: match may not be exhaustive.
[warn] one warning found [warn] It would fail on the following inputs: (0, _), (1, _), (??, _), (_, 0), (_, 1), (_, ??), (_, _)
[warn]  (ICACHE_WAYPACK, ICACHE_ECC) match{
[warn]  ^
[warn] /home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/quasar.scala:326:8: Generated class QUASAR differs only in case from quasar.
[warn]  Such classes will overwrite one another on case-insensitive filesystems.
[warn] object QUASAR extends App {
[warn]  ^
[warn] there were 5450 feature warnings; re-run with -feature for details
[warn] three warnings found

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@ -1 +1 @@
-1342856941 -1402224808

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@ -1 +1,591 @@
[debug] Jar uptodate: /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/quasar_2.12-3.3.0.jar [debug] Packaging /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/quasar_2.12-3.3.0.jar ...
[debug] Input file mappings:
[debug]  lsu
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu
[debug]  lsu/lsu_addrcheck.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_addrcheck.class
[debug]  lsu/lsu_dccm_ctl$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_dccm_ctl$$anon$1.class
[debug]  lsu/clkdomain$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/clkdomain$.class
[debug]  lsu/bus_intf.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/bus_intf.class
[debug]  lsu/lsu.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu.class
[debug]  lsu/lsu_bus_buffer$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_bus_buffer$$anon$1.class
[debug]  lsu/dccm_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/dccm_ctl.class
[debug]  lsu/lsu_trigger.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_trigger.class
[debug]  lsu/dccm_ctl$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/dccm_ctl$.class
[debug]  lsu/buffer.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/buffer.class
[debug]  lsu/bus_intf$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/bus_intf$.class
[debug]  lsu/stbuf.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/stbuf.class
[debug]  lsu/lsu_ecc.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_ecc.class
[debug]  lsu/buffer$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/buffer$delayedInit$body.class
[debug]  lsu/bus_intf$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/bus_intf$delayedInit$body.class
[debug]  lsu/stbuf$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/stbuf$delayedInit$body.class
[debug]  lsu/lsu_stbuf$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_stbuf$$anon$1.class
[debug]  lsu/lsu_main$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_main$delayedInit$body.class
[debug]  lsu/lsu_bus_intf$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_bus_intf$$anon$1.class
[debug]  lsu/stbuf$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/stbuf$.class
[debug]  lsu/lsu_main.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_main.class
[debug]  lsu/lsu_ecc$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_ecc$$anon$1.class
[debug]  lsu/dccm_ctl$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/dccm_ctl$delayedInit$body.class
[debug]  lsu/lsu_bus_buffer.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_bus_buffer.class
[debug]  lsu/lsc_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsc_ctl.class
[debug]  lsu/lsc_ctl$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsc_ctl$.class
[debug]  lsu/clkdomain.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/clkdomain.class
[debug]  lsu/buffer$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/buffer$.class
[debug]  lsu/lsu_main$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_main$.class
[debug]  lsu/lsu_lsc_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_lsc_ctl.class
[debug]  lsu/lsu_dccm_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_dccm_ctl.class
[debug]  lsu/lsu_addrcheck$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_addrcheck$$anon$1.class
[debug]  lsu/clkdomain$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/clkdomain$delayedInit$body.class
[debug]  lsu/lsu$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu$$anon$1.class
[debug]  lsu/lsu_trigger$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_trigger$$anon$1.class
[debug]  lsu/lsu_clkdomain.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_clkdomain.class
[debug]  lsu/lsu_bus_intf.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_bus_intf.class
[debug]  lsu/lsu_lsc_ctl$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_lsc_ctl$$anon$1.class
[debug]  lsu/lsc_ctl$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsc_ctl$delayedInit$body.class
[debug]  lsu/lsu_stbuf.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_stbuf.class
[debug]  lsu/lsu_clkdomain$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/lsu_clkdomain$$anon$1.class
[debug]  DMA.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/DMA.class
[debug]  pic_ctrl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/pic_ctrl.class
[debug]  lib
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib
[debug]  lib/lib$gated_latch$$anon$4.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$gated_latch$$anon$4.class
[debug]  lib/lib$rvdffiee$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdffiee$.class
[debug]  lib/lib$rvdffpcie$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdffpcie$.class
[debug]  lib/lib$rvdff_fpga$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdff_fpga$.class
[debug]  lib/lib$gated_latch.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$gated_latch.class
[debug]  lib/lib$rvclkhdr$$anon$5.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvclkhdr$$anon$5.class
[debug]  lib/param.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/param.class
[debug]  lib/lib$rvoclkhdr$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvoclkhdr$.class
[debug]  lib/axi4_to_ahb$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/axi4_to_ahb$delayedInit$body.class
[debug]  lib/lib$rvecc_encode$$anon$2.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvecc_encode$$anon$2.class
[debug]  lib/lib$rvecc_encode_64$$anon$3.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvecc_encode_64$$anon$3.class
[debug]  lib/lib$rvdfflie$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdfflie$.class
[debug]  lib/lib$rvclkhdr.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvclkhdr.class
[debug]  lib/ahb_to_axi4$$anon$1$$anon$2.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/ahb_to_axi4$$anon$1$$anon$2.class
[debug]  lib/lib$rvdffe$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdffe$.class
[debug]  lib/lib$rvclkhdr$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvclkhdr$.class
[debug]  lib/axi4_to_ahb_IO.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/axi4_to_ahb_IO.class
[debug]  lib/ahb_to_axi4$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/ahb_to_axi4$$anon$1.class
[debug]  lib/lib$rvdffsc_fpga$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdffsc_fpga$.class
[debug]  lib/lib$rvsyncss_fpga$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvsyncss_fpga$.class
[debug]  lib/lib$rvsyncss$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvsyncss$.class
[debug]  lib/ahb_to_axi4.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/ahb_to_axi4.class
[debug]  lib/lib$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$$anon$1.class
[debug]  lib/axi4_to_ahb$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/axi4_to_ahb$.class
[debug]  lib/lib.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib.class
[debug]  lib/axi4_to_ahb.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/axi4_to_ahb.class
[debug]  lib/lib$rvdffppe$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdffppe$.class
[debug]  lib/lib$rvecc_encode_64.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvecc_encode_64.class
[debug]  lib/lib$rvdffie$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdffie$.class
[debug]  lib/lib$rvecc_encode.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvecc_encode.class
[debug]  lib/lib$rvdffs_fpga$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lib/lib$rvdffs_fpga$.class
[debug]  dec
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec
[debug]  dec/int_exc$$anon$3.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/int_exc$$anon$3.class
[debug]  dec/dec_main$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_main$delayedInit$body.class
[debug]  dec/dec_timer_ctl_IO.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_timer_ctl_IO.class
[debug]  dec/dec_dec_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_dec_ctl.class
[debug]  dec/dec_decode_csr_read_IO.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_decode_csr_read_IO.class
[debug]  dec/perf_mux_and_flops.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/perf_mux_and_flops.class
[debug]  dec/tlu$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/tlu$.class
[debug]  dec/CSRs.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/CSRs.class
[debug]  dec/dec_dec.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_dec.class
[debug]  dec/dec_IO.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_IO.class
[debug]  dec/int_exc.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/int_exc.class
[debug]  dec/dec_ib_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_ib_ctl.class
[debug]  dec/perf_mux_and_flops$$anon$2.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/perf_mux_and_flops$$anon$2.class
[debug]  dec/dec_decode_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_decode_ctl.class
[debug]  dec/CSR_VAL.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/CSR_VAL.class
[debug]  dec/dec_dec_ctl$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_dec_ctl$$anon$1.class
[debug]  dec/dec_decode_ctl$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_decode_ctl$$anon$1.class
[debug]  dec/dec_dec$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_dec$.class
[debug]  dec/tlu.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/tlu.class
[debug]  dec/dec_timer_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_timer_ctl.class
[debug]  dec/perf_csr.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/perf_csr.class
[debug]  dec/dec_tlu_ctl_IO.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_tlu_ctl_IO.class
[debug]  dec/dec_gpr_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_gpr_ctl.class
[debug]  dec/csr_tlu.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/csr_tlu.class
[debug]  dec/dec_main.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_main.class
[debug]  dec/dec_main$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_main$.class
[debug]  dec/dec_trigger.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dec/dec_trigger.class
[debug]  dec/dec_tlu_ctl.class
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[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/include/inst_pkt_t$.class
[debug]  QUASAR_Wrp$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/QUASAR_Wrp$delayedInit$body.class
[debug]  dbg
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg
[debug]  dbg/debug.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/debug.class
[debug]  dbg/state_t$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/state_t$.class
[debug]  dbg/dbg.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/dbg.class
[debug]  dbg/sb_state_t.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/sb_state_t.class
[debug]  dbg/dbg$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/dbg$$anon$1.class
[debug]  dbg/debug$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/debug$.class
[debug]  dbg/state_t.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/state_t.class
[debug]  dbg/sb_state_t$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/sb_state_t$.class
[debug]  dbg/debug$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dbg/debug$delayedInit$body.class
[debug]  DMA$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/DMA$delayedInit$body.class
[debug]  QUASAR$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/QUASAR$delayedInit$body.class
[debug]  pic$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/pic$delayedInit$body.class
[debug]  quasar_bundle.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/quasar_bundle.class
[debug]  quasar.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/quasar.class
[debug]  dma_ctrl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/dma_ctrl.class
[debug]  DMA$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/DMA$.class
[debug]  .vscode
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/.vscode
[debug]  .vscode/settings.json
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/.vscode/settings.json
[debug]  pic_ctrl$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/pic_ctrl$$anon$1.class
[debug]  quasar_wrapper.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/quasar_wrapper.class
[debug]  QUASAR.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/QUASAR.class
[debug]  exu
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu
[debug]  exu/mul$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/mul$.class
[debug]  exu/mul$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/mul$delayedInit$body.class
[debug]  exu/exu.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu.class
[debug]  exu/exu_div_new_4bit_fullshortq.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_4bit_fullshortq.class
[debug]  exu/exu_div_new_3bit_fullshortq$$anon$5.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_3bit_fullshortq$$anon$5.class
[debug]  exu/exu_main$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_main$delayedInit$body.class
[debug]  exu/exu_div_existing_1bit_cheapshortq.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_existing_1bit_cheapshortq.class
[debug]  exu/div_main$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/div_main$.class
[debug]  exu/exu_mul_ctl$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_mul_ctl$$anon$1.class
[debug]  exu/exu_div_cls.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_cls.class
[debug]  exu/div_main$delayedInit$body.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/div_main$delayedInit$body.class
[debug]  exu/exu_alu_ctl$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_alu_ctl$$anon$1.class
[debug]  exu/mul.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/mul.class
[debug]  exu/exu_main.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_main.class
[debug]  exu/exu_div_ctl$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_ctl$$anon$1.class
[debug]  exu/exu_mul_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_mul_ctl.class
[debug]  exu/exu_div_new_2bit_fullshortq$$anon$4.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_2bit_fullshortq$$anon$4.class
[debug]  exu/exu_div_new_1bit_fullshortq$$anon$3.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_1bit_fullshortq$$anon$3.class
[debug]  exu/exu_main$.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_main$.class
[debug]  exu/exu_div_new_1bit_fullshortq.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_1bit_fullshortq.class
[debug]  exu/exu_div_new_2bit_fullshortq.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_2bit_fullshortq.class
[debug]  exu/exu_div_new_4bit_fullshortq$$anon$6.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_4bit_fullshortq$$anon$6.class
[debug]  exu/exu_div_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_ctl.class
[debug]  exu/exu_div_new_3bit_fullshortq.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_3bit_fullshortq.class
[debug]  exu/div_main.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/div_main.class
[debug]  exu/exu_div_cls$$anon$7.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_cls$$anon$7.class
[debug]  exu/exu$$anon$1.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu$$anon$1.class
[debug]  exu/exu_div_existing_1bit_cheapshortq$$anon$2.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_existing_1bit_cheapshortq$$anon$2.class
[debug]  exu/exu_alu_ctl.class
[debug]  /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_alu_ctl.class
[debug] Done packaging.