Memory connection updated
This commit is contained in:
Laraib Khan
parent
11695f3916
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@ -51,7 +51,7 @@ module mem
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RM_3,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_LS,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_DS,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_SD,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_SD,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RNM,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC1,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC2,
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@ -51,7 +51,7 @@ module mem
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RM_3,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_LS,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_DS,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_SD,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_SD,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_RNM,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC1,
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input [DCCM_NUM_BANKS-1:0] dccm_ext_in_pkt_BC2,
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@ -1 +1 @@
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["lsu.buffer","lsu.bus_intf","lsu.clkdomain","lsu.dccm_ctl","lsu.lsc_ctl","lsu.lsu_main","lsu.stbuf"]
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["DMA","QUASAR","QUASAR_Wrp","dbg.debug","dec.dec_dec","dec.dec_main","dec.tlu","exu.div_main","exu.exu_main","exu.mul","ifu.ifu_top","lib.axi4_to_ahb","lsu.buffer","lsu.bus_intf","lsu.clkdomain","lsu.dccm_ctl","lsu.lsc_ctl","lsu.lsu_main","lsu.stbuf","pic"]
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@ -1,2 +1,10 @@
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[0m[[0m[33mwarn[0m] [0m[0mthere were 337 feature warnings; re-run with -feature for details[0m
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[0m[[0m[33mwarn[0m] [0m[0mone warning found[0m
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[0m[[0m[33mwarn[0m] [0m[0m/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/lib/lib.scala:25:5: match may not be exhaustive.[0m
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[0m[[0m[33mwarn[0m] [0m[0mIt would fail on the following inputs: (0, _), (1, _), (??, _), (_, 0), (_, 1), (_, ??), (_, _)[0m
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[0m[[0m[33mwarn[0m] [0m[0m (ICACHE_WAYPACK, ICACHE_ECC) match{[0m
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[0m[[0m[33mwarn[0m] [0m[0m ^[0m
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[0m[[0m[33mwarn[0m] [0m[0m/home/laraibkhan/Desktop/SweRV-Chislified/src/main/scala/quasar.scala:326:8: Generated class QUASAR differs only in case from quasar.[0m
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[0m[[0m[33mwarn[0m] [0m[0m Such classes will overwrite one another on case-insensitive filesystems.[0m
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[0m[[0m[33mwarn[0m] [0m[0mobject QUASAR extends App {[0m
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[0m[[0m[33mwarn[0m] [0m[0m ^[0m
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[0m[[0m[33mwarn[0m] [0m[0mthere were 5450 feature warnings; re-run with -feature for details[0m
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[0m[[0m[33mwarn[0m] [0m[0mthree warnings found[0m
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@ -1 +1 @@
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-1342856941
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-1402224808
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@ -1 +1,591 @@
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[0m[[0m[0mdebug[0m] [0m[0mJar uptodate: /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/quasar_2.12-3.3.0.jar[0m
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[0m[[0m[0mdebug[0m] [0m[0mPackaging /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/quasar_2.12-3.3.0.jar ...[0m
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[0m[[0m[0mdebug[0m] [0m[0mInput file mappings:[0m
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[0m[[0m[0mdebug[0m] [0m[0m lsu[0m
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[0m[[0m[0mdebug[0m] [0m[0m lsu/clkdomain$.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/lsu/clkdomain$.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_existing_1bit_cheapshortq.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_existing_1bit_cheapshortq.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/div_main$.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/div_main$.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_cls.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/div_main$delayedInit$body.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/div_main$delayedInit$body.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_alu_ctl$$anon$1.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_ctl$$anon$1.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_ctl$$anon$1.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_mul_ctl.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_mul_ctl.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_new_2bit_fullshortq$$anon$4.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_2bit_fullshortq$$anon$4.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_new_1bit_fullshortq$$anon$3.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_1bit_fullshortq$$anon$3.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_main$.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_main$.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_new_1bit_fullshortq.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_1bit_fullshortq.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_new_2bit_fullshortq.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_2bit_fullshortq.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_new_4bit_fullshortq$$anon$6.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_4bit_fullshortq$$anon$6.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_ctl.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_ctl.class[0m
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_new_3bit_fullshortq.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_new_3bit_fullshortq.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m exu/div_main.class[0m
|
||||
[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/div_main.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_cls$$anon$7.class[0m
|
||||
[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_cls$$anon$7.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m exu/exu$$anon$1.class[0m
|
||||
[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu$$anon$1.class[0m
|
||||
[0m[[0m[0mdebug[0m] [0m[0m exu/exu_div_existing_1bit_cheapshortq$$anon$2.class[0m
|
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[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_div_existing_1bit_cheapshortq$$anon$2.class[0m
|
||||
[0m[[0m[0mdebug[0m] [0m[0m exu/exu_alu_ctl.class[0m
|
||||
[0m[[0m[0mdebug[0m] [0m[0m /home/laraibkhan/Desktop/SweRV-Chislified/target/scala-2.12/classes/exu/exu_alu_ctl.class[0m
|
||||
[0m[[0m[0mdebug[0m] [0m[0mDone packaging.[0m
|
||||
|
|
|
|||
Loading…
Reference in New Issue