IFC

el2_ifu_ifc_ctrl.anno.json

@@ -1,4 +1,26 @@
 [
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifc_dma_access_ok",
+    "sources":[
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_exu_flush_final",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifc_iccm_access_bf",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifc_fetch_req_bf",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifu_fb_consume2",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifu_fb_consume1",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_dec_tlu_flush_noredir_wb",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifc_fetch_addr_bf",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ic_write_stall",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifc_fetch_req_bf_raw",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ic_dma_active",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifu_bp_btb_target_f",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_exu_flush_path_final",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifc_fetch_addr_f",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ic_hit_f",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifu_bp_hit_taken_f",
+      "~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_ifc_fetch_req_f"
+    ]
+  },
   {
     "class":"firrtl.transforms.CombinationalPath",
     "sink":"~el2_ifu_ifc_ctrl|el2_ifu_ifc_ctrl>io_miss_f",

el2_ifu_ifc_ctrl.fir

@@ -235,20 +235,33 @@ circuit el2_ifu_ifc_ctrl :
     node iccm_acc_in_region_bf = eq(_T_142, UInt<4>("h0e")) @[el2_lib.scala 214:47]
     node _T_143 = bits(_T_141, 31, 16) @[el2_lib.scala 217:14]
     node iccm_acc_in_range_bf = eq(_T_143, UInt<16>("h0ee00")) @[el2_lib.scala 217:29]
-    io.ifc_iccm_access_bf <= iccm_acc_in_range_bf @[el2_ifu_ifc_ctrl.scala 141:25]
-    node _T_144 = bits(io.ifc_fetch_addr_bf, 30, 27) @[el2_ifu_ifc_ctrl.scala 142:78]
-    node _T_145 = cat(_T_144, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_146 = dshr(io.dec_tlu_mrac_ff, _T_145) @[el2_ifu_ifc_ctrl.scala 142:53]
-    node _T_147 = bits(_T_146, 0, 0) @[el2_ifu_ifc_ctrl.scala 142:53]
-    node _T_148 = not(_T_147) @[el2_ifu_ifc_ctrl.scala 142:34]
-    io.ifc_fetch_uncacheable_bf <= _T_148 @[el2_ifu_ifc_ctrl.scala 142:31]
-    reg _T_149 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 144:32]
-    _T_149 <= io.ifc_fetch_req_bf @[el2_ifu_ifc_ctrl.scala 144:32]
-    io.ifc_fetch_req_f <= _T_149 @[el2_ifu_ifc_ctrl.scala 144:22]
-    node _T_150 = or(io.exu_flush_final, io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 146:88]
-    reg _T_151 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_150 : @[Reg.scala 28:19]
-      _T_151 <= io.ifc_fetch_addr_bf @[Reg.scala 28:23]
+    io.ifc_iccm_access_bf <= iccm_acc_in_range_bf @[el2_ifu_ifc_ctrl.scala 140:25]
+    node _T_144 = eq(io.ifc_iccm_access_bf, UInt<1>("h00")) @[el2_ifu_ifc_ctrl.scala 141:30]
+    node _T_145 = or(io.ifu_fb_consume2, io.ifu_fb_consume1) @[el2_ifu_ifc_ctrl.scala 142:39]
+    node _T_146 = eq(_T_145, UInt<1>("h00")) @[el2_ifu_ifc_ctrl.scala 142:18]
+    node _T_147 = and(fb_full_f, _T_146) @[el2_ifu_ifc_ctrl.scala 142:16]
+    node _T_148 = or(_T_144, _T_147) @[el2_ifu_ifc_ctrl.scala 141:53]
+    node _T_149 = eq(io.ifc_fetch_req_bf, UInt<1>("h00")) @[el2_ifu_ifc_ctrl.scala 143:13]
+    node _T_150 = and(wfm, _T_149) @[el2_ifu_ifc_ctrl.scala 143:11]
+    node _T_151 = or(_T_148, _T_150) @[el2_ifu_ifc_ctrl.scala 142:62]
+    node _T_152 = or(_T_151, idle) @[el2_ifu_ifc_ctrl.scala 143:35]
+    node _T_153 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_ifc_ctrl.scala 143:46]
+    node _T_154 = and(_T_152, _T_153) @[el2_ifu_ifc_ctrl.scala 143:44]
+    node _T_155 = or(_T_154, dma_iccm_stall_any_f) @[el2_ifu_ifc_ctrl.scala 143:67]
+    io.ifc_dma_access_ok <= _T_155 @[el2_ifu_ifc_ctrl.scala 141:24]
+    node _T_156 = bits(io.ifc_fetch_addr_bf, 30, 27) @[el2_ifu_ifc_ctrl.scala 145:78]
+    node _T_157 = cat(_T_156, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_158 = dshr(io.dec_tlu_mrac_ff, _T_157) @[el2_ifu_ifc_ctrl.scala 145:53]
+    node _T_159 = bits(_T_158, 0, 0) @[el2_ifu_ifc_ctrl.scala 145:53]
+    node _T_160 = not(_T_159) @[el2_ifu_ifc_ctrl.scala 145:34]
+    io.ifc_fetch_uncacheable_bf <= _T_160 @[el2_ifu_ifc_ctrl.scala 145:31]
+    reg _T_161 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ifc_ctrl.scala 147:32]
+    _T_161 <= io.ifc_fetch_req_bf @[el2_ifu_ifc_ctrl.scala 147:32]
+    io.ifc_fetch_req_f <= _T_161 @[el2_ifu_ifc_ctrl.scala 147:22]
+    node _T_162 = or(io.exu_flush_final, io.ifc_fetch_req_f) @[el2_ifu_ifc_ctrl.scala 149:88]
+    reg _T_163 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_162 : @[Reg.scala 28:19]
+      _T_163 <= io.ifc_fetch_addr_bf @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    io.ifc_fetch_addr_f <= _T_151 @[el2_ifu_ifc_ctrl.scala 146:23]
+    io.ifc_fetch_addr_f <= _T_163 @[el2_ifu_ifc_ctrl.scala 149:23]
     

el2_ifu_ifc_ctrl.v

@@ -144,20 +144,28 @@ module el2_ifu_ifc_ctrl(
   wire  _T_138 = _T_137 | dma_stall; // @[el2_ifu_ifc_ctrl.scala 135:84]
   wire  _T_139 = io_ifc_fetch_req_bf_raw & _T_138; // @[el2_ifu_ifc_ctrl.scala 134:60]
   wire [31:0] _T_141 = {io_ifc_fetch_addr_bf,1'h0}; // @[Cat.scala 29:58]
-  wire [4:0] _T_145 = {io_ifc_fetch_addr_bf[30:27],1'h0}; // @[Cat.scala 29:58]
-  wire [31:0] _T_146 = io_dec_tlu_mrac_ff >> _T_145; // @[el2_ifu_ifc_ctrl.scala 142:53]
-  reg  _T_149; // @[el2_ifu_ifc_ctrl.scala 144:32]
-  reg [30:0] _T_151; // @[Reg.scala 27:20]
-  assign io_ifc_fetch_addr_f = _T_151; // @[el2_ifu_ifc_ctrl.scala 146:23]
+  wire  _T_144 = ~io_ifc_iccm_access_bf; // @[el2_ifu_ifc_ctrl.scala 141:30]
+  wire  _T_147 = fb_full_f & _T_33; // @[el2_ifu_ifc_ctrl.scala 142:16]
+  wire  _T_148 = _T_144 | _T_147; // @[el2_ifu_ifc_ctrl.scala 141:53]
+  wire  _T_149 = ~io_ifc_fetch_req_bf; // @[el2_ifu_ifc_ctrl.scala 143:13]
+  wire  _T_150 = wfm & _T_149; // @[el2_ifu_ifc_ctrl.scala 143:11]
+  wire  _T_151 = _T_148 | _T_150; // @[el2_ifu_ifc_ctrl.scala 142:62]
+  wire  _T_152 = _T_151 | idle; // @[el2_ifu_ifc_ctrl.scala 143:35]
+  wire  _T_154 = _T_152 & _T_2; // @[el2_ifu_ifc_ctrl.scala 143:44]
+  wire [4:0] _T_157 = {io_ifc_fetch_addr_bf[30:27],1'h0}; // @[Cat.scala 29:58]
+  wire [31:0] _T_158 = io_dec_tlu_mrac_ff >> _T_157; // @[el2_ifu_ifc_ctrl.scala 145:53]
+  reg  _T_161; // @[el2_ifu_ifc_ctrl.scala 147:32]
+  reg [30:0] _T_163; // @[Reg.scala 27:20]
+  assign io_ifc_fetch_addr_f = _T_163; // @[el2_ifu_ifc_ctrl.scala 149:23]
   assign io_ifc_fetch_addr_bf = _T_23[30:0]; // @[el2_ifu_ifc_ctrl.scala 76:24]
-  assign io_ifc_fetch_req_f = _T_149; // @[el2_ifu_ifc_ctrl.scala 144:22]
+  assign io_ifc_fetch_req_f = _T_161; // @[el2_ifu_ifc_ctrl.scala 147:22]
   assign io_ifu_pmu_fetch_stall = wfm | _T_139; // @[el2_ifu_ifc_ctrl.scala 134:26]
-  assign io_ifc_fetch_uncacheable_bf = ~_T_146[0]; // @[el2_ifu_ifc_ctrl.scala 142:31]
+  assign io_ifc_fetch_uncacheable_bf = ~_T_158[0]; // @[el2_ifu_ifc_ctrl.scala 145:31]
   assign io_ifc_fetch_req_bf = _T_40 & _T_41; // @[el2_ifu_ifc_ctrl.scala 90:23]
   assign io_ifc_fetch_req_bf_raw = ~idle; // @[el2_ifu_ifc_ctrl.scala 88:27]
-  assign io_ifc_iccm_access_bf = _T_141[31:16] == 16'hee00; // @[el2_ifu_ifc_ctrl.scala 141:25]
+  assign io_ifc_iccm_access_bf = _T_141[31:16] == 16'hee00; // @[el2_ifu_ifc_ctrl.scala 140:25]
   assign io_ifc_region_acc_fault_bf = 1'h0; // @[el2_ifu_ifc_ctrl.scala 41:30]
-  assign io_ifc_dma_access_ok = 1'h0; // @[el2_ifu_ifc_ctrl.scala 42:24]
+  assign io_ifc_dma_access_ok = _T_154 | dma_iccm_stall_any_f; // @[el2_ifu_ifc_ctrl.scala 42:24 el2_ifu_ifc_ctrl.scala 141:24]
   assign io_mb_empty_mod = _T_52 & _T_53; // @[el2_ifu_ifc_ctrl.scala 98:19]
   assign io_miss_f = _T_45 & _T_2; // @[el2_ifu_ifc_ctrl.scala 96:13]
 `ifdef RANDOMIZE_GARBAGE_ASSIGN
@@ -206,9 +214,9 @@ initial begin
   _RAND_4 = {1{`RANDOM}};
   fb_full_f = _RAND_4[0:0];
   _RAND_5 = {1{`RANDOM}};
-  _T_149 = _RAND_5[0:0];
+  _T_161 = _RAND_5[0:0];
   _RAND_6 = {1{`RANDOM}};
-  _T_151 = _RAND_6[30:0];
+  _T_163 = _RAND_6[30:0];
 `endif // RANDOMIZE_REG_INIT
   `endif // RANDOMIZE
 end // initial
@@ -243,14 +251,14 @@ end // initial
       fb_full_f <= fb_full_f_ns;
     end
     if (reset) begin
-      _T_149 <= 1'h0;
+      _T_161 <= 1'h0;
     end else begin
-      _T_149 <= io_ifc_fetch_req_bf;
+      _T_161 <= io_ifc_fetch_req_bf;
     end
     if (reset) begin
-      _T_151 <= 31'h0;
+      _T_163 <= 31'h0;
     end else if (fetch_bf_en) begin
-      _T_151 <= io_ifc_fetch_addr_bf;
+      _T_163 <= io_ifc_fetch_addr_bf;
     end
   end
 endmodule

src/main/scala/ifu/el2_ifu_ifc_ctrl.scala

@@ -137,8 +137,11 @@ val io = IO(new Bundle{
   val (iccm_acc_in_region_bf, iccm_acc_in_range_bf) = if(ICCM_ENABLE)
     rvrangecheck(ICCM_SADR, ICCM_SIZE, Cat(io.ifc_fetch_addr_bf,0.U))
   else (0.U, 0.U)
-
   io.ifc_iccm_access_bf := iccm_acc_in_range_bf
+  io.ifc_dma_access_ok := ( (!io.ifc_iccm_access_bf |
+    (fb_full_f & !(io.ifu_fb_consume2 | io.ifu_fb_consume1)) |
+    (wfm  & !io.ifc_fetch_req_bf) | idle ) & !io.exu_flush_final) | dma_iccm_stall_any_f
+
   io.ifc_fetch_uncacheable_bf := ~io.dec_tlu_mrac_ff(Cat(io.ifc_fetch_addr_bf(30,27), 0.U))
 
   io.ifc_fetch_req_f := RegNext(io.ifc_fetch_req_bf, init=0.U)