better MISA CSR register support
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@ -16,10 +16,12 @@
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#include "Performance.h"
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#include "Memory.h"
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#define WARL_M_EXTENSION (1 << 12)
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#define WARL_C_EXTENSION (1 << 2)
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#define WARL_I_BASE (1 << 8)
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#define WARL_MXL (1 << 30)
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#define MISA_A_EXTENSION (1 << 0)
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#define MISA_B_EXTENSION (1 << 1)
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#define MISA_C_EXTENSION (1 << 2)
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#define MISA_I_BASE (1 << 8)
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#define MISA_M_EXTENSION (1 << 12)
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#define MISA_MXL (1 << 30)
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#define CSR_MVENDORID (0xF11)
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@ -41,6 +43,12 @@
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#define CSR_MTVAL (0x343)
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#define CSR_MIP (0x344)
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#define CSR_SSCRATCH (0x140)
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#define CSR_SEPC (0x141)
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#define CSR_SCAUSE (0x142)
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#define CSR_STVAL (0x143)
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#define CSR_SIP (0x144)
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#define CSR_CYCLE (0xC00)
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#define CSR_TIME (0xC01)
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#define CSR_INSTRET (0xC02)
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@ -9,7 +9,7 @@ Registers::Registers() {
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initCSR();
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//register_bank[sp] = 1024-1; // SP points to end of memory
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register_bank[sp] = Memory::SIZE-4;
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register_PC = 0x10000; // default _start address
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register_PC = 0x80000000; // default _start address
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}
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void Registers::dump(void) {
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@ -113,10 +113,16 @@ uint32_t Registers::getCSR(int csr) {
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void Registers::setCSR(int csr, uint32_t value) {
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/* @note rv32mi-p-ma_fetch tests doesn't allow MISA to writable,
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* but Volume II: Privileged Architectura v1.10 says MISRA is writable (?)
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*/
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if (csr != CSR_MISA) {
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CSR[csr] = value;
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}
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}
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void Registers::initCSR() {
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CSR[CSR_MISA] = WARL_MXL | WARL_M_EXTENSION | WARL_C_EXTENSION | WARL_I_BASE;
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CSR[CSR_MISA] = MISA_MXL | MISA_M_EXTENSION | MISA_C_EXTENSION
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| MISA_A_EXTENSION | MISA_I_BASE;
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}
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