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better log output

This commit is contained in:
Màrius Montón 2021-11-25 23:31:49 +01:00
parent 50c6d4e6d3
commit de2e14ff28
No known key found for this signature in database
GPG Key ID: FA199E7A752699F0
3 changed files with 16 additions and 12 deletions
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13
src/BASE_ISA.cpp
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@ -284,14 +284,17 @@ bool BASE_ISA::Exec_BGEU() const {
if ( static_cast<std::uint32_t>(regs->getValue(rs1)) >= static_cast<std::uint32_t>(regs->getValue(rs2)) ) { if ( static_cast<std::uint32_t>(regs->getValue(rs1)) >= static_cast<std::uint32_t>(regs->getValue(rs2)) ) {
new_pc = static_cast<std::int32_t>(regs->getPC() + get_imm_B()); new_pc = static_cast<std::int32_t>(regs->getPC() + get_imm_B());
logger->debug("{} ns. PC: 0x{:x}. BGEU: x{:d}(0x{:x}) > x{:d}(0x{:x}) -> PC (0x{:x})", sc_core::sc_time_stamp().value(), regs->getPC(),
rs1, regs->getValue(rs1), rs2, regs->getValue(rs2), new_pc);
regs->setPC(new_pc); regs->setPC(new_pc);
} else { } else {
logger->debug("{} ns. PC: 0x{:x}. BGEU: x{:d}(0x{:x}) > x{:d}(0x{:x}) -> PC (0x{:x})", sc_core::sc_time_stamp().value(), regs->getPC(),
rs1, regs->getValue(rs1), rs2, regs->getValue(rs2), regs->getPC() + 4);
regs->incPC(); regs->incPC();
} }
logger->debug("{} ns. PC: 0x{:x}. BGEU: x{:d}(0x{:x}) > x{:d}(0x{:x}) -> PC (0x{:x})", sc_core::sc_time_stamp().value(), regs->getPC(),
rs1, regs->getValue(rs1), rs2, regs->getValue(rs2), new_pc);
return true; return true;
} }
@ -578,8 +581,8 @@ bool BASE_ISA::Exec_ANDI() const {
calc = aux & imm; calc = aux & imm;
regs->setValue(rd, static_cast<std::int32_t>(calc)); regs->setValue(rd, static_cast<std::int32_t>(calc));
logger->debug("{} ns. PC: 0x{:x}. ANDI: x{:d} AND x{:d} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(), logger->debug("{} ns. PC: 0x{:x}. ANDI: x{:d}(0x{:x}) AND 0x{:x} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(),
rs1, imm, rd); rs1, aux, imm, rd);
return true; return true;
} }

6
src/CPU.cpp
View File

@ -142,9 +142,9 @@ bool CPU::CPU_step() {
} }
} }
perf->codeMemoryRead(); perf->codeMemoryRead();
inst.setInstr(INSTR); inst.setInstr(INSTR);
bool breakpoint = false; bool breakpoint = false;
/* check what type of instruction is and execute it */ /* check what type of instruction is and execute it */
switch (inst.check_extension()) { switch (inst.check_extension()) {

9
src/C_extension.cpp
View File

@ -154,10 +154,11 @@ bool C_extension::Exec_C_JR() {
mem_addr = 0; mem_addr = 0;
new_pc = static_cast<std::int32_t>(static_cast<std::int32_t>((regs->getValue(rs1)) + static_cast<std::int32_t>(mem_addr)) & 0xFFFFFFFE); new_pc = static_cast<std::int32_t>(static_cast<std::int32_t>((regs->getValue(rs1)) + static_cast<std::int32_t>(mem_addr)) & 0xFFFFFFFE);
regs->setPC(new_pc);
logger->debug("{} ns. PC: 0x{:x}. C.JR: PC <- 0x{:x}", sc_core::sc_time_stamp().value(), regs->getPC(), new_pc); logger->debug("{} ns. PC: 0x{:x}. C.JR: PC <- 0x{:x}", sc_core::sc_time_stamp().value(), regs->getPC(), new_pc);
regs->setPC(new_pc);
return true; return true;
} }
@ -433,7 +434,7 @@ bool C_extension::Exec_C_ANDI() {
calc = aux & imm; calc = aux & imm;
regs->setValue(rd, static_cast<std::int32_t>(calc)); regs->setValue(rd, static_cast<std::int32_t>(calc));
logger->debug("{} ns. PC: 0x{:x}. C.ANDI: x{:d}({:d}) AND {:d} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(), logger->debug("{} ns. PC: 0x{:x}. C.ANDI: x{:d}(0x{:x}) AND 0x{:x} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(),
rs1, aux, imm, rd); rs1, aux, imm, rd);
return true; return true;
@ -450,8 +451,8 @@ bool C_extension::Exec_C_SUB() {
calc = regs->getValue(rs1) - regs->getValue(rs2); calc = regs->getValue(rs1) - regs->getValue(rs2);
regs->setValue(rd, static_cast<std::int32_t>(calc)); regs->setValue(rd, static_cast<std::int32_t>(calc));
logger->debug("{} ns. PC: 0x{:x}. C.SUB: x{:d} - x{:d} -> x{:d}", sc_core::sc_time_stamp().value(), regs->getPC(), logger->debug("{} ns. PC: 0x{:x}. C.SUB: x{:d} - x{:d} -> x{:d}(0x{:x})", sc_core::sc_time_stamp().value(), regs->getPC(),
rs1, rs2, rd); rs1, rs2, rd, calc);
return true; return true;
} }