2021-06-04 15:16:54 +08:00
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#ifndef _HAZARD3_CSR_H
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#define _HAZARD3_CSR_H
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2021-12-11 17:54:00 +08:00
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#ifndef __ASSEMBLER__
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#include "stdint.h"
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#endif
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2022-08-08 03:51:12 +08:00
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#define hazard3_csr_dmdata0 0xbff // Debug-mode shadow CSR for DM data transfer
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#define hazard3_csr_meiea 0xbe0 // External interrupt pending array
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#define hazard3_csr_meipa 0xbe1 // External interrupt enable array
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#define hazard3_csr_meifa 0xbe2 // External interrupt force array
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#define hazard3_csr_meipr 0xbe3 // External interrupt priority array
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#define hazard3_csr_meinext 0xbe4 // Next external interrupt
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#define hazard3_csr_meicontext 0xbe5 // External interrupt context register
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#define hazard3_csr_msleep 0xbf0 // M-mode sleep control register
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2021-06-04 15:16:54 +08:00
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2021-12-11 17:54:00 +08:00
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#define _read_csr(csrname) ({ \
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uint32_t __csr_tmp_u32; \
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asm volatile ("csrr %0, " #csrname : "=r" (__csr_tmp_u32)); \
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__csr_tmp_u32; \
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})
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#define _write_csr(csrname, data) ({ \
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asm volatile ("csrw " #csrname ", %0" : : "r" (data)); \
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})
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2022-05-25 05:14:20 +08:00
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#define _set_csr(csrname, data) ({ \
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asm volatile ("csrs " #csrname ", %0" : : "r" (data)); \
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})
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#define _clear_csr(csrname, data) ({ \
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asm volatile ("csrc " #csrname ", %0" : : "r" (data)); \
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})
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2022-08-08 03:51:12 +08:00
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#define _read_write_csr(csrname, data) ({ \
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uint32_t __csr_tmp_u32; \
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asm volatile ("csrrw %0, " #csrname ", %1" : "=r" (__csr_tmp_u32) : "r" (data)); \
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__csr_tmp_u32; \
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})
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#define _read_set_csr(csrname, data) ({ \
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uint32_t __csr_tmp_u32; \
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asm volatile ("csrrs %0, " #csrname ", %1" : "=r" (__csr_tmp_u32) : "r" (data)); \
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__csr_tmp_u32; \
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})
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#define _read_clear_csr(csrname, data) ({ \
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uint32_t __csr_tmp_u32; \
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asm volatile ("csrrc %0, " #csrname ", %1" : "=r" (__csr_tmp_u32) : "r" (data)); \
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__csr_tmp_u32; \
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})
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2021-12-11 17:54:00 +08:00
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// Argument macro expansion layer
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2022-08-08 03:51:12 +08:00
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#define read_csr(csrname) _read_csr(csrname)
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#define write_csr(csrname, data) _write_csr(csrname, data)
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#define set_csr(csrname, data) _set_csr(csrname, data)
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#define clear_csr(csrname, data) _clear_csr(csrname, data)
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#define read_write_csr(csrname, data) _read_write_csr(csrname, data)
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#define read_set_csr(csrname, data) _read_set_csr(csrname, data)
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#define read_clear_csr(csrname, data) _read_clear_csr(csrname, data)
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2021-12-11 17:54:00 +08:00
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2021-06-04 15:16:54 +08:00
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#endif
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