|  Luke Wren | 08e986912c | Also fix RAW stall on JALR instructions, oops. Runs CoreMark and Dhrystone now | 2021-05-22 11:18:56 +01:00 | 
				
					
						|  Luke Wren | 6692c1f26d | Fix premature taking of branches with RAW data dependencies on the previous instruction | 2021-05-22 10:18:47 +01:00 | 
				
					
						|  Luke Wren | cc6f590f2e | Fix some issues in predecode of register numbers for compressed ISA. RV32IC compliance now passes, hello world does not work still | 2021-05-22 10:16:02 +01:00 | 
				
					
						|  Luke Wren | 692abbad8b | Merge stages D and X, and bring all branch resolution into X. Passes RV32I compliance | 2021-05-22 07:55:13 +01:00 | 
				
					
						|  Luke Wren | 844fa8f97f | Rename hazard5 -> hazard3 | 2021-05-21 03:46:29 +01:00 | 
				
					
						|  Luke Wren | af0af41385 | Add small readme | 2021-05-21 03:39:10 +01:00 | 
				
					
						|  Luke Wren | 5de4f01aae | Change how constants are plumbed through the hierarchy. Some small cleanups of variable declaration order etc | 2021-05-21 03:23:44 +01:00 | 
				
					
						|  Luke Wren | 6dad4e20bb | Import from hazard5 9743a1b | 2021-05-21 02:34:16 +01:00 |