799f4f2c26
Fix verilator lint width issues in triggers, PMP, DM.
...
There was one genuine issue introduced by PPA changes in 78a5cb98e
2024-05-29 15:32:45 +01:00
7d370292b0
Fix transposition of RWX <-> XWR in PMP implementation.
...
None of upstream tests used for Hazard3 seem to cover X != R. The
Hazard3 tests covered this case, but the header file for the tests has
the same mistake. Fix the header.
2024-04-27 13:52:43 +01:00
c55d3f0d0b
Make custom IRQ and PMP functionality optional. Factor out IRQ controller into separate module.
2022-10-05 23:53:04 +01:00
9eb8590858
Add generate to avoid elaborating internals of PMP/triggers with 0 PMP regions or triggers.
2022-09-05 00:36:41 +01:00
3b7cd9bc96
Cleanup some unused signals
2022-08-20 16:44:39 +01:00
276830ecb6
Fix missing default assignment of i_m in PMP decode
2022-08-16 09:23:42 +01:00
be05dc32d4
Oops, typo in update of new pmpcfg_m field
2022-08-11 20:46:32 +01:00
5819f8eb7e
Remove wrong/useless mxr logic in PMP
2022-08-08 18:45:37 +01:00
92ebbbe95f
Add pmpcfgm0 register: make regions M-mode without locking them
2022-08-08 18:34:55 +01:00
add19506a5
Oops, bad if block nesting in PMP
2022-07-25 13:09:03 +01:00
254350d300
Clean up tie-off of hardwired PMP registers
2022-07-04 14:31:42 +01:00
ae2784d0ea
PMP config: separate granularity config from hardwired region config. Give correct read value for G > 1.
2022-06-03 17:09:43 +01:00
e0a9fb7312
Add option to hardwire PMP regions, or reduce their granularity
2022-06-03 01:19:03 +01:00
c93228d13e
Integrate PMP, and fix a couple of PMP bugs
2022-05-24 19:57:45 +01:00
d62861159f
First pass at U-mode CSR support. Bizarrely causes CXXRTL tb to not write to stdout when invoked by subprocess.run from Python.
2022-05-24 16:17:54 +01:00
c0b5d73cbd
Typo in for loop, surprised Yosys accepted this
2022-05-23 18:15:36 +01:00
5466c8131e
Sketch in PMP implementation
2022-05-23 18:06:23 +01:00
Luke Wren