Luke Wren
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d1f1421728
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Fix width lints in muldiv_seq, onehot_priority_dynamic, and irq_ctrl. All cosmetic.
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2024-05-29 15:52:53 +01:00 |
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Luke Wren
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360b034f76
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Fix a few width issues identified by verilator lint. All of them gave
well-defined correct results already (i.e. correctly zero-extended per
spec) but best to avoid the noise.
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2024-05-26 17:32:24 +01:00 |
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Luke Wren
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aa438fc37c
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Remove op_b (rs2) register from muldiv_seq for modest LUT/FF savings
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2022-10-08 18:22:16 +01:00 |
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Luke Wren
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5d6b5a80b0
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Standardise on ifndef YOSYS around default_nettype wire
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2022-08-21 13:22:55 +01:00 |
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Luke Wren
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5193dfe477
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Add separate define HAZARD3_ASSERTIONS for enabling internal assertions,
and enable it only on the bus compliance model checks. Trying to make
the solver's life easier in instruction_fetch_match.
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2022-06-25 20:08:40 +01:00 |
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Luke Wren
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ea2b8888a4
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Update copyright years
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2022-06-09 00:12:01 +01:00 |
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Luke Wren
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b0d28447ab
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New license headers: DWTFPL -> Apache 2.0
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2021-12-13 23:23:40 +00:00 |
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Luke Wren
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c8afb4ac33
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Add option for fast high-half multiplies
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2021-11-29 18:48:02 +00:00 |
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Luke Wren
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e05e9a4109
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Add default_nettype none at top of every file, and default_nettype wire at bottom
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2021-11-23 22:10:39 +00:00 |
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Luke Wren
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844fa8f97f
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Rename hazard5 -> hazard3
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2021-05-21 03:46:29 +01:00 |