Luke Wren 1cd5b7fed7 Temporarily disable two riscv-arch-test tests with known issues: ... * jalr-01 uses 'la x0' which is rejected as invalid by recent binutils * cebreak-01 miscompares due to hardwired mtval (common upstream test issue) Correct fix is blocked on bringing up the latest riscv-arch-test build system for hazard3 (seems to have been completely rewritten again)		2024-08-07 16:13:44 -07:00
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riscv-arch-test@099a701679	Temporarily disable two riscv-arch-test tests with known issues:	2024-08-07 16:13:44 -07:00
.gitignore	Organise test directory into formal and sim	2021-05-23 07:42:35 +01:00
clean_all.sh	Fix +x permission of riscv-compliance/clean_all script	2023-04-01 04:42:15 +01:00
compare_testvec	Organise test directory into formal and sim	2021-05-23 07:42:35 +01:00
run_32i.sh	Update to the latest riscv-arch-test. This uses the new test	2023-03-31 01:39:48 +01:00
run_32ic.sh	Update to the latest riscv-arch-test. This uses the new test	2023-03-31 01:39:48 +01:00
run_32im.sh	Fix +x permission of riscv-compliance/clean_all script	2023-04-01 04:42:15 +01:00
run_32privilege.sh	Add run_all script under riscv-compliance	2021-12-11 12:08:53 +00:00
run_all.sh	Update to the latest riscv-arch-test. This uses the new test	2023-03-31 01:39:48 +01:00
scrape_testvec	Update to the latest riscv-arch-test. This uses the new test	2023-03-31 01:39:48 +01:00
test.gtkw	Remove the halfword fetch thing, was only really useful on RISCBoy	2022-04-02 10:54:16 +01:00