Hazard3/example_soc/soc
Luke Wren 1fa773c67a Minimal RV32IMA + debug that fits on iCEBreaker. Not sure why area has regressed so much recently. 2021-12-05 02:16:54 +00:00
..
example_soc.v Minimal RV32IMA + debug that fits on iCEBreaker. Not sure why area has regressed so much recently. 2021-12-05 02:16:54 +00:00
soc.f Experimentally add SPI XIP to SoC (breaks FTDI UART on iCEBreaker -- need to move UART to a PMOD to avoid IO conflict) 2021-08-21 17:04:15 +01:00