Colin
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973950cc1b
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add VexRiscv remote-bitbang support, but fail current.
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2025-03-25 11:11:31 +08:00 |
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Colin
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3ca3f614fe
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Add jtag dpi in murax.
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2025-03-25 11:11:31 +08:00 |
|
Colin
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202042c913
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Add Vexriscv demo and murax.
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2025-03-25 11:11:31 +08:00 |
colin
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e26d5260de
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start to add ecp5 support,current donet support jlink
Use FT2232H base jtag,and VexRiscv's openocd to support dbg.
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2022-02-28 03:34:59 +00:00 |
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colin
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2c4658ddb9
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Refine murax sim config file
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2022-02-28 03:33:41 +00:00 |
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colin
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94c99367ba
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remove gen file in fpga
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2022-02-27 04:49:27 +00:00 |
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colin
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1d1237c223
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Add VexRiscv fpga generation to ecp5.
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2022-02-26 15:14:43 +00:00 |
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colin
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25a557365b
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Enable VexRiscv murax jtag simulator by verilator.
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2022-02-26 14:34:25 +00:00 |
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colin
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65545d5e03
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Add VexRiscv.
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2022-02-25 11:56:36 +00:00 |