not start an SB write access when sbreadonaddr/dbreadondata is set. Add fpga_optimize option to swerv.config; eliminates over 90% of clock-gating to support faster FPGA simulation. |
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|---|---|---|
| .. | ||
| dbg | ||
| dec | ||
| dmi | ||
| exu | ||
| ifu | ||
| include | ||
| lib | ||
| lsu | ||
| dma_ctrl.sv | ||
| mem.sv | ||
| pic_ctrl.sv | ||
| swerv.sv | ||
| swerv_wrapper.sv | ||