quasar/el2_lsu_stbuf.anno.json

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[
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_stbuf_full_any",
"sources":[
"~el2_lsu_stbuf|el2_lsu_stbuf>io_dec_lsu_valid_raw_d",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_d",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_d",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_r",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dma",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_store",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_m_bits_dma",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_m_valid",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_m_bits_store"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_ldst_stbuf_reqvld_r",
"sources":[
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_commit_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r"
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]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_reqvld_any",
"sources":[
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_m_bits_store",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_m_bits_dma",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_m_valid",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_m",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_m"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_fwdbyteen_hi_m",
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"sources":[
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_store",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dma",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_m",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dword",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_word",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_by",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_half"
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]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_fwddata_lo_m",
"sources":[
"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_data_lo_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_data_hi_r",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_store",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dma",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_m",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_r",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dword",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_word",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_by",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_half"
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]
},
{
"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_fwdbyteen_lo_m",
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"sources":[
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_store",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dma",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_m",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_r",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dword",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_word",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_by",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_half"
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]
},
{
"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_lsu_stbuf|el2_lsu_stbuf>io_stbuf_fwddata_hi_m",
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"sources":[
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_data_lo_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_data_hi_r",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_addr_in_dccm_m",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_store",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dma",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_store_stbuf_reqvld_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_valid",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_m",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_addr_r",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_end_addr_r",
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"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_dword",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_word",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_by",
"~el2_lsu_stbuf|el2_lsu_stbuf>io_lsu_pkt_r_bits_half"
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]
},
{
"class":"firrtl.EmitCircuitAnnotation",
"emitter":"firrtl.VerilogEmitter"
},
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{
"class":"firrtl.transforms.BlackBoxResourceAnno",
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"target":"el2_lsu_stbuf.gated_latch",
"resourceId":"/vsrc/gated_latch.v"
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},
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{
"class":"firrtl.options.TargetDirAnnotation",
"directory":"."
},
{
"class":"firrtl.options.OutputAnnotationFileAnnotation",
"file":"el2_lsu_stbuf"
},
{
"class":"firrtl.transforms.BlackBoxTargetDirAnno",
"targetDir":"."
}
]