Compressed

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waleed-lm 2020-09-28 11:26:48 +05:00
parent 5f65e686d3
commit 026787ea25
4 changed files with 829 additions and 862 deletions

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@ -317,212 +317,213 @@ module el2_ifu_compress_ctl(
wire _T_1140 = _T_889 & io_din[11]; // @[el2_ifu_compress_ctl.scala 20:110]
wire sluimm17_12 = _T_1132 | _T_1140; // @[el2_ifu_compress_ctl.scala 98:29]
wire uimm5_0 = _T_79 | _T_195; // @[el2_ifu_compress_ctl.scala 99:45]
wire [4:0] _T_1186 = rdrd ? rdd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1187 = rdprd ? rdpd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1188 = rs2prd ? rs2pd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1189 = rdeq1 ? 5'h1 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1190 = rdeq2 ? 5'h2 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1191 = _T_1186 | _T_1187; // @[Mux.scala 27:72]
wire [4:0] _T_1192 = _T_1191 | _T_1188; // @[Mux.scala 27:72]
wire [4:0] _T_1193 = _T_1192 | _T_1189; // @[Mux.scala 27:72]
wire [4:0] l1_11 = _T_1193 | _T_1190; // @[Mux.scala 27:72]
wire [4:0] _T_1205 = rdrs1 ? rdd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1206 = rdprs1 ? rdpd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1207 = rs1eq2 ? 5'h2 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1208 = _T_1205 | _T_1206; // @[Mux.scala 27:72]
wire [4:0] l1_19 = _T_1208 | _T_1207; // @[Mux.scala 27:72]
wire [4:0] _T_1215 = {out_20,1'h0,1'h0,2'h0}; // @[el2_ifu_compress_ctl.scala 110:64]
wire [4:0] _T_1218 = rs2rs2 ? rs2d : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1219 = rs2prs2 ? rs2pd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1220 = _T_1218 | _T_1219; // @[Mux.scala 27:72]
wire [4:0] l1_24 = _T_1215 | _T_1220; // @[el2_ifu_compress_ctl.scala 110:71]
wire [14:0] _T_1229 = {out_14,out_13,out_12,l1_11,2'h3,out_2,_T_228,out_4,out_5,out_6}; // @[Cat.scala 29:58]
wire [16:0] _T_1231 = {4'h0,1'h0,out_30,1'h0,l1_24,l1_19}; // @[Cat.scala 29:58]
wire [31:0] l1 = {4'h0,1'h0,out_30,1'h0,l1_24,l1_19,_T_1229}; // @[Cat.scala 29:58]
wire [6:0] l1_6 = {out_6,out_5,out_4,_T_228,out_2,1'h1,1'h1}; // @[Cat.scala 29:58]
wire [4:0] _T_1184 = rdrd ? rdd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1185 = rdprd ? rdpd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1186 = rs2prd ? rs2pd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1187 = rdeq1 ? 5'h1 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1188 = rdeq2 ? 5'h2 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1189 = _T_1184 | _T_1185; // @[Mux.scala 27:72]
wire [4:0] _T_1190 = _T_1189 | _T_1186; // @[Mux.scala 27:72]
wire [4:0] _T_1191 = _T_1190 | _T_1187; // @[Mux.scala 27:72]
wire [4:0] l1_11 = _T_1191 | _T_1188; // @[Mux.scala 27:72]
wire [4:0] _T_1202 = rdrs1 ? rdd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1203 = rdprs1 ? rdpd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1204 = rs1eq2 ? 5'h2 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1205 = _T_1202 | _T_1203; // @[Mux.scala 27:72]
wire [4:0] l1_19 = _T_1205 | _T_1204; // @[Mux.scala 27:72]
wire [4:0] _T_1211 = {3'h0,1'h0,out_20}; // @[Cat.scala 29:58]
wire [4:0] _T_1214 = rs2rs2 ? rs2d : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1215 = rs2prs2 ? rs2pd : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1216 = _T_1214 | _T_1215; // @[Mux.scala 27:72]
wire [4:0] l1_24 = _T_1211 | _T_1216; // @[el2_ifu_compress_ctl.scala 110:67]
wire [14:0] _T_1224 = {out_14,out_13,out_12,l1_11,l1_6}; // @[Cat.scala 29:58]
wire [16:0] _T_1226 = {1'h0,out_30,2'h0,3'h0,l1_24,l1_19}; // @[Cat.scala 29:58]
wire [31:0] l1 = {1'h0,out_30,2'h0,3'h0,l1_24,l1_19,_T_1224}; // @[Cat.scala 29:58]
wire [5:0] simm5d = {io_din[12],rs2d}; // @[Cat.scala 29:58]
wire [5:0] simm9d = {io_din[12],io_din[4:3],io_din[5],io_din[2],io_din[6]}; // @[Cat.scala 29:58]
wire [8:0] sjald_12 = io_din[12] ? 9'h1ff : 9'h0; // @[Bitwise.scala 72:12]
wire [19:0] sjald = {sjald_12,io_din[12],io_din[8],io_din[10:9],io_din[6],io_din[7],io_din[2],io_din[11],io_din[5:4],io_din[3]}; // @[Cat.scala 29:58]
wire [14:0] _T_1278 = io_din[12] ? 15'h7fff : 15'h0; // @[Bitwise.scala 72:12]
wire [19:0] sluimmd = {_T_1278,rs2d}; // @[Cat.scala 29:58]
wire [6:0] _T_1284 = simm5d[5] ? 7'h7f : 7'h0; // @[Bitwise.scala 72:12]
wire [11:0] _T_1286 = {_T_1284,simm5d[4:0]}; // @[Cat.scala 29:58]
wire [11:0] _T_1289 = {2'h0,io_din[10:7],io_din[12:11],io_din[5],io_din[6],2'h0}; // @[Cat.scala 29:58]
wire [2:0] _T_1293 = simm9d[5] ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12]
wire [11:0] _T_1296 = {_T_1293,simm9d[4:0],4'h0}; // @[Cat.scala 29:58]
wire [11:0] _T_1299 = {5'h0,io_din[5],io_din[12:10],io_din[6],2'h0}; // @[Cat.scala 29:58]
wire [11:0] _T_1302 = {4'h0,io_din[3:2],io_din[12],io_din[6:4],2'h0}; // @[Cat.scala 29:58]
wire [11:0] _T_1304 = {6'h0,io_din[12],rs2d}; // @[Cat.scala 29:58]
wire [11:0] _T_1309 = {sjald[19],sjald[9:0],sjald[10]}; // @[Cat.scala 29:58]
wire [11:0] _T_1311 = simm5_0 ? _T_1286 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1312 = uimm9_2 ? _T_1289 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1313 = rdeq2 ? _T_1296 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1314 = ulwimm6_2 ? _T_1299 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1315 = ulwspimm7_2 ? _T_1302 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1316 = uimm5_0 ? _T_1304 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1317 = _T_228 ? _T_1309 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1318 = sluimm17_12 ? sluimmd[19:8] : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1319 = _T_1311 | _T_1312; // @[Mux.scala 27:72]
wire [14:0] _T_1273 = io_din[12] ? 15'h7fff : 15'h0; // @[Bitwise.scala 72:12]
wire [19:0] sluimmd = {_T_1273,rs2d}; // @[Cat.scala 29:58]
wire [6:0] _T_1279 = simm5d[5] ? 7'h7f : 7'h0; // @[Bitwise.scala 72:12]
wire [11:0] _T_1281 = {_T_1279,simm5d[4:0]}; // @[Cat.scala 29:58]
wire [11:0] _T_1284 = {2'h0,io_din[10:7],io_din[12:11],io_din[5],io_din[6],2'h0}; // @[Cat.scala 29:58]
wire [2:0] _T_1288 = simm9d[5] ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12]
wire [11:0] _T_1291 = {_T_1288,simm9d[4:0],4'h0}; // @[Cat.scala 29:58]
wire [11:0] _T_1294 = {5'h0,io_din[5],io_din[12:10],io_din[6],2'h0}; // @[Cat.scala 29:58]
wire [11:0] _T_1297 = {4'h0,io_din[3:2],io_din[12],io_din[6:4],2'h0}; // @[Cat.scala 29:58]
wire [11:0] _T_1299 = {6'h0,io_din[12],rs2d}; // @[Cat.scala 29:58]
wire [11:0] _T_1304 = {sjald[19],sjald[9:0],sjald[10]}; // @[Cat.scala 29:58]
wire [11:0] _T_1306 = simm5_0 ? _T_1281 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1307 = uimm9_2 ? _T_1284 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1308 = rdeq2 ? _T_1291 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1309 = ulwimm6_2 ? _T_1294 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1310 = ulwspimm7_2 ? _T_1297 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1311 = uimm5_0 ? _T_1299 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1312 = _T_228 ? _T_1304 : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1313 = sluimm17_12 ? sluimmd[19:8] : 12'h0; // @[Mux.scala 27:72]
wire [11:0] _T_1314 = _T_1306 | _T_1307; // @[Mux.scala 27:72]
wire [11:0] _T_1315 = _T_1314 | _T_1308; // @[Mux.scala 27:72]
wire [11:0] _T_1316 = _T_1315 | _T_1309; // @[Mux.scala 27:72]
wire [11:0] _T_1317 = _T_1316 | _T_1310; // @[Mux.scala 27:72]
wire [11:0] _T_1318 = _T_1317 | _T_1311; // @[Mux.scala 27:72]
wire [11:0] _T_1319 = _T_1318 | _T_1312; // @[Mux.scala 27:72]
wire [11:0] _T_1320 = _T_1319 | _T_1313; // @[Mux.scala 27:72]
wire [11:0] _T_1321 = _T_1320 | _T_1314; // @[Mux.scala 27:72]
wire [11:0] _T_1322 = _T_1321 | _T_1315; // @[Mux.scala 27:72]
wire [11:0] _T_1323 = _T_1322 | _T_1316; // @[Mux.scala 27:72]
wire [11:0] _T_1324 = _T_1323 | _T_1317; // @[Mux.scala 27:72]
wire [11:0] _T_1325 = _T_1324 | _T_1318; // @[Mux.scala 27:72]
wire [11:0] l2_31 = l1[31:20] | _T_1325; // @[el2_ifu_compress_ctl.scala 126:25]
wire [8:0] _T_1332 = _T_228 ? sjald[19:11] : 9'h0; // @[Mux.scala 27:72]
wire [7:0] _T_1333 = sluimm17_12 ? sluimmd[7:0] : 8'h0; // @[Mux.scala 27:72]
wire [8:0] _GEN_0 = {{1'd0}, _T_1333}; // @[Mux.scala 27:72]
wire [8:0] _T_1334 = _T_1332 | _GEN_0; // @[Mux.scala 27:72]
wire [11:0] l2_31 = l1[31:20] | _T_1320; // @[el2_ifu_compress_ctl.scala 126:25]
wire [8:0] _T_1327 = _T_228 ? sjald[19:11] : 9'h0; // @[Mux.scala 27:72]
wire [7:0] _T_1328 = sluimm17_12 ? sluimmd[7:0] : 8'h0; // @[Mux.scala 27:72]
wire [8:0] _GEN_0 = {{1'd0}, _T_1328}; // @[Mux.scala 27:72]
wire [8:0] _T_1329 = _T_1327 | _GEN_0; // @[Mux.scala 27:72]
wire [8:0] _GEN_1 = {{1'd0}, l1[19:12]}; // @[el2_ifu_compress_ctl.scala 136:25]
wire [8:0] l2_19 = _GEN_1 | _T_1334; // @[el2_ifu_compress_ctl.scala 136:25]
wire [8:0] l2_19 = _GEN_1 | _T_1329; // @[el2_ifu_compress_ctl.scala 136:25]
wire [32:0] l2 = {l2_31,l2_19,l1[11:0]}; // @[Cat.scala 29:58]
wire [8:0] sbr8d = {io_din[12],io_din[6],io_din[5],io_din[2],io_din[11],io_din[10],io_din[4],io_din[3],1'h0}; // @[Cat.scala 29:58]
wire [6:0] uswimm6d = {io_din[5],io_din[12:10],io_din[6],2'h0}; // @[Cat.scala 29:58]
wire [7:0] uswspimm7d = {io_din[8:7],io_din[12:9],2'h0}; // @[Cat.scala 29:58]
wire [3:0] _T_1365 = sbr8d[8] ? 4'hf : 4'h0; // @[Bitwise.scala 72:12]
wire [6:0] _T_1367 = {_T_1365,sbr8d[7:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1370 = {5'h0,uswimm6d[6:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1373 = {4'h0,uswspimm7d[7:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1374 = _T_234 ? _T_1367 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1375 = _T_846 ? _T_1370 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1376 = _T_799 ? _T_1373 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1377 = _T_1374 | _T_1375; // @[Mux.scala 27:72]
wire [6:0] _T_1378 = _T_1377 | _T_1376; // @[Mux.scala 27:72]
wire [6:0] l3_31 = l2[31:25] | _T_1378; // @[el2_ifu_compress_ctl.scala 142:25]
wire [3:0] _T_1360 = sbr8d[8] ? 4'hf : 4'h0; // @[Bitwise.scala 72:12]
wire [6:0] _T_1362 = {_T_1360,sbr8d[7:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1365 = {5'h0,uswimm6d[6:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1368 = {4'h0,uswspimm7d[7:5]}; // @[Cat.scala 29:58]
wire [6:0] _T_1369 = _T_234 ? _T_1362 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1370 = _T_846 ? _T_1365 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1371 = _T_799 ? _T_1368 : 7'h0; // @[Mux.scala 27:72]
wire [6:0] _T_1372 = _T_1369 | _T_1370; // @[Mux.scala 27:72]
wire [6:0] _T_1373 = _T_1372 | _T_1371; // @[Mux.scala 27:72]
wire [6:0] l3_31 = l2[31:25] | _T_1373; // @[el2_ifu_compress_ctl.scala 142:25]
wire [12:0] l3_24 = l2[24:12]; // @[el2_ifu_compress_ctl.scala 145:17]
wire [4:0] _T_1384 = {sbr8d[4:1],sbr8d[8]}; // @[Cat.scala 29:58]
wire [4:0] _T_1389 = _T_234 ? _T_1384 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1390 = _T_846 ? uswimm6d[4:0] : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1391 = _T_799 ? uswspimm7d[4:0] : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1392 = _T_1389 | _T_1390; // @[Mux.scala 27:72]
wire [4:0] _T_1393 = _T_1392 | _T_1391; // @[Mux.scala 27:72]
wire [4:0] l3_11 = l2[11:7] | _T_1393; // @[el2_ifu_compress_ctl.scala 146:24]
wire [11:0] _T_1396 = {l3_11,l2[6:0]}; // @[Cat.scala 29:58]
wire [19:0] _T_1397 = {l3_31,l3_24}; // @[Cat.scala 29:58]
wire [4:0] _T_1379 = {sbr8d[4:1],sbr8d[8]}; // @[Cat.scala 29:58]
wire [4:0] _T_1384 = _T_234 ? _T_1379 : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1385 = _T_846 ? uswimm6d[4:0] : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1386 = _T_799 ? uswspimm7d[4:0] : 5'h0; // @[Mux.scala 27:72]
wire [4:0] _T_1387 = _T_1384 | _T_1385; // @[Mux.scala 27:72]
wire [4:0] _T_1388 = _T_1387 | _T_1386; // @[Mux.scala 27:72]
wire [4:0] l3_11 = l2[11:7] | _T_1388; // @[el2_ifu_compress_ctl.scala 146:24]
wire [11:0] _T_1391 = {l3_11,l2[6:0]}; // @[Cat.scala 29:58]
wire [19:0] _T_1392 = {l3_31,l3_24}; // @[Cat.scala 29:58]
wire [31:0] l3 = {l3_31,l3_24,l3_11,l2[6:0]}; // @[Cat.scala 29:58]
wire _T_1404 = _T_4 & _T_487; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1405 = _T_1404 & io_din[11]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1406 = _T_1405 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1409 = _T_1406 & _T_147; // @[el2_ifu_compress_ctl.scala 151:39]
wire _T_1417 = _T_1404 & io_din[6]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1418 = _T_1417 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1421 = _T_1418 & _T_147; // @[el2_ifu_compress_ctl.scala 151:79]
wire _T_1422 = _T_1409 | _T_1421; // @[el2_ifu_compress_ctl.scala 151:54]
wire _T_1431 = _T_642 & io_din[11]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1432 = _T_1431 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1433 = _T_1422 | _T_1432; // @[el2_ifu_compress_ctl.scala 151:94]
wire _T_1441 = _T_1404 & io_din[5]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1442 = _T_1441 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1445 = _T_1442 & _T_147; // @[el2_ifu_compress_ctl.scala 152:55]
wire _T_1446 = _T_1433 | _T_1445; // @[el2_ifu_compress_ctl.scala 152:30]
wire _T_1454 = _T_1404 & io_din[10]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1455 = _T_1454 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1458 = _T_1455 & _T_147; // @[el2_ifu_compress_ctl.scala 152:96]
wire _T_1459 = _T_1446 | _T_1458; // @[el2_ifu_compress_ctl.scala 152:70]
wire _T_1468 = _T_642 & io_din[6]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1469 = _T_1468 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1470 = _T_1459 | _T_1469; // @[el2_ifu_compress_ctl.scala 152:111]
wire _T_1477 = io_din[15] & _T_487; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1478 = _T_1477 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1479 = _T_1478 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1480 = _T_1470 | _T_1479; // @[el2_ifu_compress_ctl.scala 153:29]
wire _T_1488 = _T_1404 & io_din[9]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1489 = _T_1488 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1492 = _T_1489 & _T_147; // @[el2_ifu_compress_ctl.scala 153:79]
wire _T_1493 = _T_1480 | _T_1492; // @[el2_ifu_compress_ctl.scala 153:54]
wire _T_1500 = _T_487 & io_din[6]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1501 = _T_1500 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1502 = _T_1501 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1503 = _T_1493 | _T_1502; // @[el2_ifu_compress_ctl.scala 153:94]
wire _T_1512 = _T_642 & io_din[5]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1513 = _T_1512 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1514 = _T_1503 | _T_1513; // @[el2_ifu_compress_ctl.scala 153:118]
wire _T_1522 = _T_1404 & io_din[8]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1523 = _T_1522 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1526 = _T_1523 & _T_147; // @[el2_ifu_compress_ctl.scala 154:28]
wire _T_1527 = _T_1514 | _T_1526; // @[el2_ifu_compress_ctl.scala 153:144]
wire _T_1534 = _T_487 & io_din[5]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1535 = _T_1534 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1536 = _T_1535 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1537 = _T_1527 | _T_1536; // @[el2_ifu_compress_ctl.scala 154:43]
wire _T_1546 = _T_642 & io_din[10]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1547 = _T_1546 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1548 = _T_1537 | _T_1547; // @[el2_ifu_compress_ctl.scala 154:67]
wire _T_1556 = _T_1404 & io_din[7]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1557 = _T_1556 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1560 = _T_1557 & _T_147; // @[el2_ifu_compress_ctl.scala 155:28]
wire _T_1561 = _T_1548 | _T_1560; // @[el2_ifu_compress_ctl.scala 154:94]
wire _T_1569 = io_din[12] & io_din[11]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1570 = _T_1569 & _T_38; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1571 = _T_1570 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1572 = _T_1571 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1573 = _T_1561 | _T_1572; // @[el2_ifu_compress_ctl.scala 155:43]
wire _T_1582 = _T_642 & io_din[9]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1583 = _T_1582 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1584 = _T_1573 | _T_1583; // @[el2_ifu_compress_ctl.scala 155:71]
wire _T_1592 = _T_1404 & io_din[4]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1593 = _T_1592 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1596 = _T_1593 & _T_147; // @[el2_ifu_compress_ctl.scala 156:28]
wire _T_1597 = _T_1584 | _T_1596; // @[el2_ifu_compress_ctl.scala 155:97]
wire _T_1603 = io_din[13] & io_din[12]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1604 = _T_1603 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1605 = _T_1604 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1606 = _T_1597 | _T_1605; // @[el2_ifu_compress_ctl.scala 156:43]
wire _T_1615 = _T_642 & io_din[8]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1616 = _T_1615 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1617 = _T_1606 | _T_1616; // @[el2_ifu_compress_ctl.scala 156:67]
wire _T_1625 = _T_1404 & io_din[3]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1626 = _T_1625 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1629 = _T_1626 & _T_147; // @[el2_ifu_compress_ctl.scala 157:28]
wire _T_1630 = _T_1617 | _T_1629; // @[el2_ifu_compress_ctl.scala 156:93]
wire _T_1636 = io_din[13] & io_din[4]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1637 = _T_1636 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1638 = _T_1637 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1639 = _T_1630 | _T_1638; // @[el2_ifu_compress_ctl.scala 157:43]
wire _T_1647 = _T_1404 & io_din[2]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1648 = _T_1647 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1651 = _T_1648 & _T_147; // @[el2_ifu_compress_ctl.scala 157:91]
wire _T_1652 = _T_1639 | _T_1651; // @[el2_ifu_compress_ctl.scala 157:66]
wire _T_1661 = _T_642 & io_din[7]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1662 = _T_1661 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1663 = _T_1652 | _T_1662; // @[el2_ifu_compress_ctl.scala 157:106]
wire _T_1669 = io_din[13] & io_din[3]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1670 = _T_1669 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1671 = _T_1670 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1672 = _T_1663 | _T_1671; // @[el2_ifu_compress_ctl.scala 158:29]
wire _T_1678 = io_din[13] & io_din[2]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1679 = _T_1678 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1680 = _T_1679 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1681 = _T_1672 | _T_1680; // @[el2_ifu_compress_ctl.scala 158:52]
wire _T_1687 = io_din[14] & _T_4; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1688 = _T_1687 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1689 = _T_1681 | _T_1688; // @[el2_ifu_compress_ctl.scala 158:75]
wire _T_1698 = _T_703 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1699 = _T_1698 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1700 = _T_1689 | _T_1699; // @[el2_ifu_compress_ctl.scala 158:98]
wire _T_1707 = _T_812 & io_din[12]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1708 = _T_1707 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1711 = _T_1708 & _T_147; // @[el2_ifu_compress_ctl.scala 159:54]
wire _T_1712 = _T_1700 | _T_1711; // @[el2_ifu_compress_ctl.scala 159:29]
wire _T_1721 = _T_642 & _T_487; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1722 = _T_1721 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1725 = _T_1722 & _T_147; // @[el2_ifu_compress_ctl.scala 159:96]
wire _T_1726 = _T_1712 | _T_1725; // @[el2_ifu_compress_ctl.scala 159:69]
wire _T_1735 = _T_642 & io_din[12]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1736 = _T_1735 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1737 = _T_1726 | _T_1736; // @[el2_ifu_compress_ctl.scala 159:111]
wire _T_1744 = _T_1687 & _T_147; // @[el2_ifu_compress_ctl.scala 160:50]
wire legal = _T_1737 | _T_1744; // @[el2_ifu_compress_ctl.scala 160:30]
wire [31:0] _T_1746 = legal ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12]
wire [9:0] _T_1756 = {1'h0,out_30,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0}; // @[Cat.scala 29:58]
wire [18:0] _T_1765 = {_T_1756,1'h0,out_20,1'h0,1'h0,1'h0,1'h0,1'h0,out_14,out_13}; // @[Cat.scala 29:58]
wire [27:0] _T_1774 = {_T_1765,out_12,1'h0,1'h0,1'h0,1'h0,1'h0,out_6,out_5,out_4}; // @[Cat.scala 29:58]
wire [30:0] _T_1777 = {_T_1774,_T_228,out_2,1'h1}; // @[Cat.scala 29:58]
assign io_dout = l3 & _T_1746; // @[el2_ifu_compress_ctl.scala 162:10]
assign io_l1 = {_T_1231,_T_1229}; // @[el2_ifu_compress_ctl.scala 163:9]
wire _T_1399 = _T_4 & _T_487; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1400 = _T_1399 & io_din[11]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1401 = _T_1400 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1404 = _T_1401 & _T_147; // @[el2_ifu_compress_ctl.scala 151:39]
wire _T_1412 = _T_1399 & io_din[6]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1413 = _T_1412 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1416 = _T_1413 & _T_147; // @[el2_ifu_compress_ctl.scala 151:79]
wire _T_1417 = _T_1404 | _T_1416; // @[el2_ifu_compress_ctl.scala 151:54]
wire _T_1426 = _T_642 & io_din[11]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1427 = _T_1426 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1428 = _T_1417 | _T_1427; // @[el2_ifu_compress_ctl.scala 151:94]
wire _T_1436 = _T_1399 & io_din[5]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1437 = _T_1436 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1440 = _T_1437 & _T_147; // @[el2_ifu_compress_ctl.scala 152:55]
wire _T_1441 = _T_1428 | _T_1440; // @[el2_ifu_compress_ctl.scala 152:30]
wire _T_1449 = _T_1399 & io_din[10]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1450 = _T_1449 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1453 = _T_1450 & _T_147; // @[el2_ifu_compress_ctl.scala 152:96]
wire _T_1454 = _T_1441 | _T_1453; // @[el2_ifu_compress_ctl.scala 152:70]
wire _T_1463 = _T_642 & io_din[6]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1464 = _T_1463 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1465 = _T_1454 | _T_1464; // @[el2_ifu_compress_ctl.scala 152:111]
wire _T_1472 = io_din[15] & _T_487; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1473 = _T_1472 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1474 = _T_1473 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1475 = _T_1465 | _T_1474; // @[el2_ifu_compress_ctl.scala 153:29]
wire _T_1483 = _T_1399 & io_din[9]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1484 = _T_1483 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1487 = _T_1484 & _T_147; // @[el2_ifu_compress_ctl.scala 153:79]
wire _T_1488 = _T_1475 | _T_1487; // @[el2_ifu_compress_ctl.scala 153:54]
wire _T_1495 = _T_487 & io_din[6]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1496 = _T_1495 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1497 = _T_1496 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1498 = _T_1488 | _T_1497; // @[el2_ifu_compress_ctl.scala 153:94]
wire _T_1507 = _T_642 & io_din[5]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1508 = _T_1507 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1509 = _T_1498 | _T_1508; // @[el2_ifu_compress_ctl.scala 153:118]
wire _T_1517 = _T_1399 & io_din[8]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1518 = _T_1517 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1521 = _T_1518 & _T_147; // @[el2_ifu_compress_ctl.scala 154:28]
wire _T_1522 = _T_1509 | _T_1521; // @[el2_ifu_compress_ctl.scala 153:144]
wire _T_1529 = _T_487 & io_din[5]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1530 = _T_1529 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1531 = _T_1530 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1532 = _T_1522 | _T_1531; // @[el2_ifu_compress_ctl.scala 154:43]
wire _T_1541 = _T_642 & io_din[10]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1542 = _T_1541 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1543 = _T_1532 | _T_1542; // @[el2_ifu_compress_ctl.scala 154:67]
wire _T_1551 = _T_1399 & io_din[7]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1552 = _T_1551 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1555 = _T_1552 & _T_147; // @[el2_ifu_compress_ctl.scala 155:28]
wire _T_1556 = _T_1543 | _T_1555; // @[el2_ifu_compress_ctl.scala 154:94]
wire _T_1564 = io_din[12] & io_din[11]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1565 = _T_1564 & _T_38; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1566 = _T_1565 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1567 = _T_1566 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1568 = _T_1556 | _T_1567; // @[el2_ifu_compress_ctl.scala 155:43]
wire _T_1577 = _T_642 & io_din[9]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1578 = _T_1577 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1579 = _T_1568 | _T_1578; // @[el2_ifu_compress_ctl.scala 155:71]
wire _T_1587 = _T_1399 & io_din[4]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1588 = _T_1587 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1591 = _T_1588 & _T_147; // @[el2_ifu_compress_ctl.scala 156:28]
wire _T_1592 = _T_1579 | _T_1591; // @[el2_ifu_compress_ctl.scala 155:97]
wire _T_1598 = io_din[13] & io_din[12]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1599 = _T_1598 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1600 = _T_1599 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1601 = _T_1592 | _T_1600; // @[el2_ifu_compress_ctl.scala 156:43]
wire _T_1610 = _T_642 & io_din[8]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1611 = _T_1610 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1612 = _T_1601 | _T_1611; // @[el2_ifu_compress_ctl.scala 156:67]
wire _T_1620 = _T_1399 & io_din[3]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1621 = _T_1620 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1624 = _T_1621 & _T_147; // @[el2_ifu_compress_ctl.scala 157:28]
wire _T_1625 = _T_1612 | _T_1624; // @[el2_ifu_compress_ctl.scala 156:93]
wire _T_1631 = io_din[13] & io_din[4]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1632 = _T_1631 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1633 = _T_1632 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1634 = _T_1625 | _T_1633; // @[el2_ifu_compress_ctl.scala 157:43]
wire _T_1642 = _T_1399 & io_din[2]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1643 = _T_1642 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1646 = _T_1643 & _T_147; // @[el2_ifu_compress_ctl.scala 157:91]
wire _T_1647 = _T_1634 | _T_1646; // @[el2_ifu_compress_ctl.scala 157:66]
wire _T_1656 = _T_642 & io_din[7]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1657 = _T_1656 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1658 = _T_1647 | _T_1657; // @[el2_ifu_compress_ctl.scala 157:106]
wire _T_1664 = io_din[13] & io_din[3]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1665 = _T_1664 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1666 = _T_1665 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1667 = _T_1658 | _T_1666; // @[el2_ifu_compress_ctl.scala 158:29]
wire _T_1673 = io_din[13] & io_din[2]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1674 = _T_1673 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1675 = _T_1674 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1676 = _T_1667 | _T_1675; // @[el2_ifu_compress_ctl.scala 158:52]
wire _T_1682 = io_din[14] & _T_4; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1683 = _T_1682 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1684 = _T_1676 | _T_1683; // @[el2_ifu_compress_ctl.scala 158:75]
wire _T_1693 = _T_703 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1694 = _T_1693 & io_din[0]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1695 = _T_1684 | _T_1694; // @[el2_ifu_compress_ctl.scala 158:98]
wire _T_1702 = _T_812 & io_din[12]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1703 = _T_1702 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1706 = _T_1703 & _T_147; // @[el2_ifu_compress_ctl.scala 159:54]
wire _T_1707 = _T_1695 | _T_1706; // @[el2_ifu_compress_ctl.scala 159:29]
wire _T_1716 = _T_642 & _T_487; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1717 = _T_1716 & io_din[1]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1720 = _T_1717 & _T_147; // @[el2_ifu_compress_ctl.scala 159:96]
wire _T_1721 = _T_1707 | _T_1720; // @[el2_ifu_compress_ctl.scala 159:69]
wire _T_1730 = _T_642 & io_din[12]; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1731 = _T_1730 & _T_822; // @[el2_ifu_compress_ctl.scala 20:110]
wire _T_1732 = _T_1721 | _T_1731; // @[el2_ifu_compress_ctl.scala 159:111]
wire _T_1739 = _T_1682 & _T_147; // @[el2_ifu_compress_ctl.scala 160:50]
wire legal = _T_1732 | _T_1739; // @[el2_ifu_compress_ctl.scala 160:30]
wire [31:0] _T_1741 = legal ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12]
wire [9:0] _T_1751 = {1'h0,out_30,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0}; // @[Cat.scala 29:58]
wire [18:0] _T_1760 = {_T_1751,1'h0,out_20,1'h0,1'h0,1'h0,1'h0,1'h0,out_14,out_13}; // @[Cat.scala 29:58]
wire [27:0] _T_1769 = {_T_1760,out_12,1'h0,1'h0,1'h0,1'h0,1'h0,out_6,out_5,out_4}; // @[Cat.scala 29:58]
wire [30:0] _T_1772 = {_T_1769,_T_228,out_2,1'h1}; // @[Cat.scala 29:58]
assign io_dout = l3 & _T_1741; // @[el2_ifu_compress_ctl.scala 162:10]
assign io_l1 = {_T_1226,_T_1224}; // @[el2_ifu_compress_ctl.scala 163:9]
assign io_l2 = l2[31:0]; // @[el2_ifu_compress_ctl.scala 164:9]
assign io_l3 = {_T_1397,_T_1396}; // @[el2_ifu_compress_ctl.scala 165:9]
assign io_legal = _T_1737 | _T_1744; // @[el2_ifu_compress_ctl.scala 166:12]
assign io_o = {_T_1777,1'h1}; // @[el2_ifu_compress_ctl.scala 167:8]
assign io_l3 = {_T_1392,_T_1391}; // @[el2_ifu_compress_ctl.scala 165:9]
assign io_legal = _T_1732 | _T_1739; // @[el2_ifu_compress_ctl.scala 166:12]
assign io_o = {_T_1772,1'h1}; // @[el2_ifu_compress_ctl.scala 167:8]
endmodule

View File

@ -100,16 +100,16 @@ class el2_ifu_compress_ctl extends Module {
val uswimm6_2 = pat(List(15,-1))&(!io.din(0))
val uswspimm7_2 = pat(List(15,14,1))
val l1_6 = VecInit(out(6),out(5),out(4),out(3),out(2),out(1),out(0)).asUInt()
val l1_11 = VecInit(out(11),out(10),out(9),out(8),out(7)).asUInt | Mux1H(Seq(rdrd.asBool->rdd,
val l1_6 = Cat(out(6),out(5),out(4),out(3),out(2),out(1),out(0)).asUInt()
val l1_11 = Cat(out(11),out(10),out(9),out(8),out(7)).asUInt | Mux1H(Seq(rdrd.asBool->rdd,
rdprd.asBool->rdpd, rs2prd.asBool->rs2pd, rdeq1.asBool->1.U(5.W), rdeq2.asBool->2.U(5.W)))
val l1_14 = Cat(out(14),out(13),out(12))
val l1_19 = VecInit(out(19),out(18),out(17),out(16),out(15)).asUInt | Mux1H(Seq(rdrs1.asBool->rdd,
val l1_19 = Cat(out(19),out(18),out(17),out(16),out(15)).asUInt | Mux1H(Seq(rdrs1.asBool->rdd,
rdprs1.asBool->rdpd, rs1eq2.asBool->2.U(5.W)))
val l1_24 = VecInit(out(24),out(23),out(22),out(21),out(20)).asUInt | Mux1H(Seq(rs2rs2.asBool->rs2d,
val l1_24 = Cat(out(24),out(23),out(22),out(21),out(20)).asUInt | Mux1H(Seq(rs2rs2.asBool->rs2d,
rs2prs2.asBool->rs2pd))
val l1_31 = VecInit(out(31),out(30),out(29),out(28),out(27),out(26),out(25)).asUInt
val l1_31 = Cat(out(31),out(30),out(29),out(28),out(27),out(26),out(25)).asUInt
val l1 = Cat(l1_31,l1_24,l1_19,l1_14,l1_11,l1_6)
val simm5d = Cat(io.din(12), io.din(6,2))