Aligner Updated
This commit is contained in:
waleed-lm
parent
7cd988ef67
commit
74207eab87
1421
el2_ifu_aln_ctl.fir
1421
el2_ifu_aln_ctl.fir
File diff suppressed because it is too large
Load Diff
|
|
@ -517,7 +517,7 @@ module el2_ifu_aln_ctl(
|
||||||
input io_ic_access_fault_f,
|
input io_ic_access_fault_f,
|
||||||
input [1:0] io_ic_access_fault_type_f,
|
input [1:0] io_ic_access_fault_type_f,
|
||||||
input [7:0] io_ifu_bp_fghr_f,
|
input [7:0] io_ifu_bp_fghr_f,
|
||||||
input [31:0] io_ifu_bp_btb_target_f,
|
input [30:0] io_ifu_bp_btb_target_f,
|
||||||
input [11:0] io_ifu_bp_poffset_f,
|
input [11:0] io_ifu_bp_poffset_f,
|
||||||
input [1:0] io_ifu_bp_hist0_f,
|
input [1:0] io_ifu_bp_hist0_f,
|
||||||
input [1:0] io_ifu_bp_hist1_f,
|
input [1:0] io_ifu_bp_hist1_f,
|
||||||
|
|
@ -592,8 +592,8 @@ module el2_ifu_aln_ctl(
|
||||||
reg q2off; // @[el2_ifu_aln_ctl.scala 136:48]
|
reg q2off; // @[el2_ifu_aln_ctl.scala 136:48]
|
||||||
reg q1off; // @[el2_ifu_aln_ctl.scala 137:48]
|
reg q1off; // @[el2_ifu_aln_ctl.scala 137:48]
|
||||||
reg q0off; // @[el2_ifu_aln_ctl.scala 138:48]
|
reg q0off; // @[el2_ifu_aln_ctl.scala 138:48]
|
||||||
wire _T_786 = ~error_stall; // @[el2_ifu_aln_ctl.scala 408:39]
|
wire _T_785 = ~error_stall; // @[el2_ifu_aln_ctl.scala 408:39]
|
||||||
wire i0_shift = io_dec_i0_decode_d & _T_786; // @[el2_ifu_aln_ctl.scala 408:37]
|
wire i0_shift = io_dec_i0_decode_d & _T_785; // @[el2_ifu_aln_ctl.scala 408:37]
|
||||||
wire _T_186 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 188:31]
|
wire _T_186 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 188:31]
|
||||||
wire _T_189 = _T_186 & q0off; // @[Mux.scala 27:72]
|
wire _T_189 = _T_186 & q0off; // @[Mux.scala 27:72]
|
||||||
wire _T_187 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 189:11]
|
wire _T_187 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 189:11]
|
||||||
|
|
@ -607,23 +607,23 @@ module el2_ifu_aln_ctl(
|
||||||
wire [2:0] qren = {_T_188,_T_187,_T_186}; // @[Cat.scala 29:58]
|
wire [2:0] qren = {_T_188,_T_187,_T_186}; // @[Cat.scala 29:58]
|
||||||
reg [31:0] q1; // @[Reg.scala 27:20]
|
reg [31:0] q1; // @[Reg.scala 27:20]
|
||||||
reg [31:0] q0; // @[Reg.scala 27:20]
|
reg [31:0] q0; // @[Reg.scala 27:20]
|
||||||
wire [63:0] _T_480 = {q1,q0}; // @[Cat.scala 29:58]
|
wire [63:0] _T_479 = {q1,q0}; // @[Cat.scala 29:58]
|
||||||
wire [63:0] _T_487 = qren[0] ? _T_480 : 64'h0; // @[Mux.scala 27:72]
|
wire [63:0] _T_486 = qren[0] ? _T_479 : 64'h0; // @[Mux.scala 27:72]
|
||||||
reg [31:0] q2; // @[Reg.scala 27:20]
|
reg [31:0] q2; // @[Reg.scala 27:20]
|
||||||
wire [63:0] _T_483 = {q2,q1}; // @[Cat.scala 29:58]
|
wire [63:0] _T_482 = {q2,q1}; // @[Cat.scala 29:58]
|
||||||
wire [63:0] _T_488 = qren[1] ? _T_483 : 64'h0; // @[Mux.scala 27:72]
|
wire [63:0] _T_487 = qren[1] ? _T_482 : 64'h0; // @[Mux.scala 27:72]
|
||||||
wire [63:0] _T_490 = _T_487 | _T_488; // @[Mux.scala 27:72]
|
wire [63:0] _T_489 = _T_486 | _T_487; // @[Mux.scala 27:72]
|
||||||
wire [63:0] _T_486 = {q0,q2}; // @[Cat.scala 29:58]
|
wire [63:0] _T_485 = {q0,q2}; // @[Cat.scala 29:58]
|
||||||
wire [63:0] _T_489 = qren[2] ? _T_486 : 64'h0; // @[Mux.scala 27:72]
|
wire [63:0] _T_488 = qren[2] ? _T_485 : 64'h0; // @[Mux.scala 27:72]
|
||||||
wire [63:0] qeff = _T_490 | _T_489; // @[Mux.scala 27:72]
|
wire [63:0] qeff = _T_489 | _T_488; // @[Mux.scala 27:72]
|
||||||
wire [31:0] q0eff = qeff[31:0]; // @[el2_ifu_aln_ctl.scala 310:42]
|
wire [31:0] q0eff = qeff[31:0]; // @[el2_ifu_aln_ctl.scala 310:42]
|
||||||
wire [31:0] _T_497 = q0sel[0] ? q0eff : 32'h0; // @[Mux.scala 27:72]
|
wire [31:0] _T_496 = q0sel[0] ? q0eff : 32'h0; // @[Mux.scala 27:72]
|
||||||
wire [15:0] _T_498 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
|
wire [15:0] _T_497 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
|
||||||
wire [31:0] _GEN_12 = {{16'd0}, _T_498}; // @[Mux.scala 27:72]
|
wire [31:0] _GEN_12 = {{16'd0}, _T_497}; // @[Mux.scala 27:72]
|
||||||
wire [31:0] q0final = _T_497 | _GEN_12; // @[Mux.scala 27:72]
|
wire [31:0] q0final = _T_496 | _GEN_12; // @[Mux.scala 27:72]
|
||||||
wire [31:0] _T_521 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72]
|
wire [31:0] _T_520 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72]
|
||||||
wire _T_514 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58]
|
wire _T_513 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58]
|
||||||
wire _T_516 = _T_514 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68]
|
wire _T_515 = _T_513 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68]
|
||||||
wire _T_197 = _T_186 & q1off; // @[Mux.scala 27:72]
|
wire _T_197 = _T_186 & q1off; // @[Mux.scala 27:72]
|
||||||
wire _T_198 = _T_187 & q2off; // @[Mux.scala 27:72]
|
wire _T_198 = _T_187 & q2off; // @[Mux.scala 27:72]
|
||||||
wire _T_200 = _T_197 | _T_198; // @[Mux.scala 27:72]
|
wire _T_200 = _T_197 | _T_198; // @[Mux.scala 27:72]
|
||||||
|
|
@ -632,92 +632,92 @@ module el2_ifu_aln_ctl(
|
||||||
wire _T_203 = ~q1ptr; // @[el2_ifu_aln_ctl.scala 196:26]
|
wire _T_203 = ~q1ptr; // @[el2_ifu_aln_ctl.scala 196:26]
|
||||||
wire [1:0] q1sel = {q1ptr,_T_203}; // @[Cat.scala 29:58]
|
wire [1:0] q1sel = {q1ptr,_T_203}; // @[Cat.scala 29:58]
|
||||||
wire [31:0] q1eff = qeff[63:32]; // @[el2_ifu_aln_ctl.scala 310:29]
|
wire [31:0] q1eff = qeff[63:32]; // @[el2_ifu_aln_ctl.scala 310:29]
|
||||||
wire [15:0] _T_507 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
|
wire [15:0] _T_506 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
|
||||||
wire [15:0] _T_508 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
|
wire [15:0] _T_507 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
|
||||||
wire [15:0] q1final = _T_507 | _T_508; // @[Mux.scala 27:72]
|
wire [15:0] q1final = _T_506 | _T_507; // @[Mux.scala 27:72]
|
||||||
wire [31:0] _T_520 = {q1final,q0final[15:0]}; // @[Cat.scala 29:58]
|
wire [31:0] _T_519 = {q1final,q0final[15:0]}; // @[Cat.scala 29:58]
|
||||||
wire [31:0] _T_522 = _T_516 ? _T_520 : 32'h0; // @[Mux.scala 27:72]
|
wire [31:0] _T_521 = _T_515 ? _T_519 : 32'h0; // @[Mux.scala 27:72]
|
||||||
wire [31:0] aligndata = _T_521 | _T_522; // @[Mux.scala 27:72]
|
wire [31:0] aligndata = _T_520 | _T_521; // @[Mux.scala 27:72]
|
||||||
wire first4B = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 348:29]
|
wire first4B = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 348:29]
|
||||||
wire first2B = ~first4B; // @[el2_ifu_aln_ctl.scala 350:17]
|
wire first2B = ~first4B; // @[el2_ifu_aln_ctl.scala 350:17]
|
||||||
wire shift_2B = i0_shift & first2B; // @[el2_ifu_aln_ctl.scala 412:24]
|
wire shift_2B = i0_shift & first2B; // @[el2_ifu_aln_ctl.scala 412:24]
|
||||||
wire [1:0] _T_444 = {1'h0,f0val[1]}; // @[Cat.scala 29:58]
|
wire [1:0] _T_443 = {1'h0,f0val[1]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_449 = shift_2B ? _T_444 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_448 = shift_2B ? _T_443 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire _T_445 = ~shift_2B; // @[el2_ifu_aln_ctl.scala 300:18]
|
wire _T_444 = ~shift_2B; // @[el2_ifu_aln_ctl.scala 300:18]
|
||||||
wire shift_4B = i0_shift & first4B; // @[el2_ifu_aln_ctl.scala 413:24]
|
wire shift_4B = i0_shift & first4B; // @[el2_ifu_aln_ctl.scala 413:24]
|
||||||
wire _T_446 = ~shift_4B; // @[el2_ifu_aln_ctl.scala 300:30]
|
wire _T_445 = ~shift_4B; // @[el2_ifu_aln_ctl.scala 300:30]
|
||||||
wire _T_447 = _T_445 & _T_446; // @[el2_ifu_aln_ctl.scala 300:28]
|
wire _T_446 = _T_444 & _T_445; // @[el2_ifu_aln_ctl.scala 300:28]
|
||||||
wire [1:0] _T_450 = _T_447 ? f0val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_449 = _T_446 ? f0val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] sf0val = _T_449 | _T_450; // @[Mux.scala 27:72]
|
wire [1:0] sf0val = _T_448 | _T_449; // @[Mux.scala 27:72]
|
||||||
wire sf0_valid = sf0val[0]; // @[el2_ifu_aln_ctl.scala 253:22]
|
wire sf0_valid = sf0val[0]; // @[el2_ifu_aln_ctl.scala 253:22]
|
||||||
wire _T_352 = ~sf0_valid; // @[el2_ifu_aln_ctl.scala 272:26]
|
wire _T_351 = ~sf0_valid; // @[el2_ifu_aln_ctl.scala 272:26]
|
||||||
wire _T_803 = f0val[0] & _T_514; // @[el2_ifu_aln_ctl.scala 416:28]
|
wire _T_802 = f0val[0] & _T_513; // @[el2_ifu_aln_ctl.scala 416:28]
|
||||||
wire f1_shift_2B = _T_803 & shift_4B; // @[el2_ifu_aln_ctl.scala 416:40]
|
wire f1_shift_2B = _T_802 & shift_4B; // @[el2_ifu_aln_ctl.scala 416:40]
|
||||||
wire _T_418 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72]
|
wire _T_417 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72]
|
||||||
wire _T_417 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 293:53]
|
wire _T_416 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 293:53]
|
||||||
wire [1:0] _T_419 = _T_417 ? f1val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_418 = _T_416 ? f1val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _GEN_13 = {{1'd0}, _T_418}; // @[Mux.scala 27:72]
|
wire [1:0] _GEN_13 = {{1'd0}, _T_417}; // @[Mux.scala 27:72]
|
||||||
wire [1:0] sf1val = _GEN_13 | _T_419; // @[Mux.scala 27:72]
|
wire [1:0] sf1val = _GEN_13 | _T_418; // @[Mux.scala 27:72]
|
||||||
wire sf1_valid = sf1val[0]; // @[el2_ifu_aln_ctl.scala 252:22]
|
wire sf1_valid = sf1val[0]; // @[el2_ifu_aln_ctl.scala 252:22]
|
||||||
wire _T_353 = _T_352 & sf1_valid; // @[el2_ifu_aln_ctl.scala 272:37]
|
wire _T_352 = _T_351 & sf1_valid; // @[el2_ifu_aln_ctl.scala 272:37]
|
||||||
wire f2_valid = f2val[0]; // @[el2_ifu_aln_ctl.scala 251:20]
|
wire f2_valid = f2val[0]; // @[el2_ifu_aln_ctl.scala 251:20]
|
||||||
wire _T_354 = _T_353 & f2_valid; // @[el2_ifu_aln_ctl.scala 272:50]
|
wire _T_353 = _T_352 & f2_valid; // @[el2_ifu_aln_ctl.scala 272:50]
|
||||||
wire ifvalid = io_ifu_fetch_val[0]; // @[el2_ifu_aln_ctl.scala 261:30]
|
wire ifvalid = io_ifu_fetch_val[0]; // @[el2_ifu_aln_ctl.scala 261:30]
|
||||||
wire _T_355 = _T_354 & ifvalid; // @[el2_ifu_aln_ctl.scala 272:62]
|
wire _T_354 = _T_353 & ifvalid; // @[el2_ifu_aln_ctl.scala 272:62]
|
||||||
wire _T_356 = sf0_valid & sf1_valid; // @[el2_ifu_aln_ctl.scala 273:37]
|
wire _T_355 = sf0_valid & sf1_valid; // @[el2_ifu_aln_ctl.scala 273:37]
|
||||||
wire _T_357 = ~f2_valid; // @[el2_ifu_aln_ctl.scala 273:52]
|
wire _T_356 = ~f2_valid; // @[el2_ifu_aln_ctl.scala 273:52]
|
||||||
wire _T_358 = _T_356 & _T_357; // @[el2_ifu_aln_ctl.scala 273:50]
|
wire _T_357 = _T_355 & _T_356; // @[el2_ifu_aln_ctl.scala 273:50]
|
||||||
wire _T_359 = _T_358 & ifvalid; // @[el2_ifu_aln_ctl.scala 273:62]
|
wire _T_358 = _T_357 & ifvalid; // @[el2_ifu_aln_ctl.scala 273:62]
|
||||||
wire fetch_to_f2 = _T_355 | _T_359; // @[el2_ifu_aln_ctl.scala 272:74]
|
wire fetch_to_f2 = _T_354 | _T_358; // @[el2_ifu_aln_ctl.scala 272:74]
|
||||||
reg [30:0] f2pc; // @[Reg.scala 27:20]
|
reg [30:0] f2pc; // @[Reg.scala 27:20]
|
||||||
wire _T_336 = ~sf1_valid; // @[el2_ifu_aln_ctl.scala 268:39]
|
wire _T_335 = ~sf1_valid; // @[el2_ifu_aln_ctl.scala 268:39]
|
||||||
wire _T_337 = _T_352 & _T_336; // @[el2_ifu_aln_ctl.scala 268:37]
|
wire _T_336 = _T_351 & _T_335; // @[el2_ifu_aln_ctl.scala 268:37]
|
||||||
wire _T_338 = _T_337 & f2_valid; // @[el2_ifu_aln_ctl.scala 268:50]
|
wire _T_337 = _T_336 & f2_valid; // @[el2_ifu_aln_ctl.scala 268:50]
|
||||||
wire _T_339 = _T_338 & ifvalid; // @[el2_ifu_aln_ctl.scala 268:62]
|
wire _T_338 = _T_337 & ifvalid; // @[el2_ifu_aln_ctl.scala 268:62]
|
||||||
wire _T_343 = _T_353 & _T_357; // @[el2_ifu_aln_ctl.scala 269:50]
|
wire _T_342 = _T_352 & _T_356; // @[el2_ifu_aln_ctl.scala 269:50]
|
||||||
wire _T_344 = _T_343 & ifvalid; // @[el2_ifu_aln_ctl.scala 269:62]
|
wire _T_343 = _T_342 & ifvalid; // @[el2_ifu_aln_ctl.scala 269:62]
|
||||||
wire _T_345 = _T_339 | _T_344; // @[el2_ifu_aln_ctl.scala 268:74]
|
wire _T_344 = _T_338 | _T_343; // @[el2_ifu_aln_ctl.scala 268:74]
|
||||||
wire _T_347 = sf0_valid & _T_336; // @[el2_ifu_aln_ctl.scala 270:37]
|
wire _T_346 = sf0_valid & _T_335; // @[el2_ifu_aln_ctl.scala 270:37]
|
||||||
wire _T_349 = _T_347 & _T_357; // @[el2_ifu_aln_ctl.scala 270:50]
|
wire _T_348 = _T_346 & _T_356; // @[el2_ifu_aln_ctl.scala 270:50]
|
||||||
wire _T_350 = _T_349 & ifvalid; // @[el2_ifu_aln_ctl.scala 270:62]
|
wire _T_349 = _T_348 & ifvalid; // @[el2_ifu_aln_ctl.scala 270:62]
|
||||||
wire fetch_to_f1 = _T_345 | _T_350; // @[el2_ifu_aln_ctl.scala 269:74]
|
wire fetch_to_f1 = _T_344 | _T_349; // @[el2_ifu_aln_ctl.scala 269:74]
|
||||||
wire _T_25 = fetch_to_f1 | _T_354; // @[el2_ifu_aln_ctl.scala 157:33]
|
wire _T_25 = fetch_to_f1 | _T_353; // @[el2_ifu_aln_ctl.scala 157:33]
|
||||||
wire f1_shift_wr_en = _T_25 | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 157:47]
|
wire f1_shift_wr_en = _T_25 | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 157:47]
|
||||||
reg [30:0] f1pc; // @[Reg.scala 27:20]
|
reg [30:0] f1pc; // @[Reg.scala 27:20]
|
||||||
wire [30:0] _T_376 = fetch_to_f1 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_375 = fetch_to_f1 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_377 = _T_354 ? f2pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_376 = _T_353 ? f2pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_379 = _T_376 | _T_377; // @[Mux.scala 27:72]
|
wire [30:0] _T_378 = _T_375 | _T_376; // @[Mux.scala 27:72]
|
||||||
wire _T_372 = ~fetch_to_f1; // @[el2_ifu_aln_ctl.scala 283:6]
|
wire _T_371 = ~fetch_to_f1; // @[el2_ifu_aln_ctl.scala 283:6]
|
||||||
wire _T_373 = ~_T_354; // @[el2_ifu_aln_ctl.scala 283:21]
|
wire _T_372 = ~_T_353; // @[el2_ifu_aln_ctl.scala 283:21]
|
||||||
wire _T_374 = _T_372 & _T_373; // @[el2_ifu_aln_ctl.scala 283:19]
|
wire _T_373 = _T_371 & _T_372; // @[el2_ifu_aln_ctl.scala 283:19]
|
||||||
wire [30:0] _T_364 = f1_shift_2B ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
|
wire [30:0] _T_363 = f1_shift_2B ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
|
||||||
wire [30:0] f1pc_plus1 = f1pc + 31'h1; // @[el2_ifu_aln_ctl.scala 277:25]
|
wire [30:0] f1pc_plus1 = f1pc + 31'h1; // @[el2_ifu_aln_ctl.scala 277:25]
|
||||||
wire [30:0] _T_365 = _T_364 & f1pc_plus1; // @[el2_ifu_aln_ctl.scala 279:38]
|
wire [30:0] _T_364 = _T_363 & f1pc_plus1; // @[el2_ifu_aln_ctl.scala 279:38]
|
||||||
wire [30:0] _T_368 = _T_417 ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
|
wire [30:0] _T_367 = _T_416 ? 31'h7fffffff : 31'h0; // @[Bitwise.scala 72:12]
|
||||||
wire [30:0] _T_369 = _T_368 & f1pc; // @[el2_ifu_aln_ctl.scala 279:78]
|
wire [30:0] _T_368 = _T_367 & f1pc; // @[el2_ifu_aln_ctl.scala 279:78]
|
||||||
wire [30:0] sf1pc = _T_365 | _T_369; // @[el2_ifu_aln_ctl.scala 279:52]
|
wire [30:0] sf1pc = _T_364 | _T_368; // @[el2_ifu_aln_ctl.scala 279:52]
|
||||||
wire [30:0] _T_378 = _T_374 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_377 = _T_373 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] f1pc_in = _T_379 | _T_378; // @[Mux.scala 27:72]
|
wire [30:0] f1pc_in = _T_378 | _T_377; // @[Mux.scala 27:72]
|
||||||
wire _T_333 = _T_337 & _T_357; // @[el2_ifu_aln_ctl.scala 267:50]
|
wire _T_332 = _T_336 & _T_356; // @[el2_ifu_aln_ctl.scala 267:50]
|
||||||
wire fetch_to_f0 = _T_333 & ifvalid; // @[el2_ifu_aln_ctl.scala 267:62]
|
wire fetch_to_f0 = _T_332 & ifvalid; // @[el2_ifu_aln_ctl.scala 267:62]
|
||||||
wire _T_27 = fetch_to_f0 | _T_338; // @[el2_ifu_aln_ctl.scala 158:33]
|
wire _T_27 = fetch_to_f0 | _T_337; // @[el2_ifu_aln_ctl.scala 158:33]
|
||||||
wire _T_28 = _T_27 | _T_353; // @[el2_ifu_aln_ctl.scala 158:47]
|
wire _T_28 = _T_27 | _T_352; // @[el2_ifu_aln_ctl.scala 158:47]
|
||||||
wire _T_29 = _T_28 | shift_2B; // @[el2_ifu_aln_ctl.scala 158:61]
|
wire _T_29 = _T_28 | shift_2B; // @[el2_ifu_aln_ctl.scala 158:61]
|
||||||
wire f0_shift_wr_en = _T_29 | shift_4B; // @[el2_ifu_aln_ctl.scala 158:72]
|
wire f0_shift_wr_en = _T_29 | shift_4B; // @[el2_ifu_aln_ctl.scala 158:72]
|
||||||
reg [30:0] f0pc; // @[Reg.scala 27:20]
|
reg [30:0] f0pc; // @[Reg.scala 27:20]
|
||||||
wire [30:0] _T_391 = fetch_to_f0 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_390 = fetch_to_f0 ? io_ifu_fetch_pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_392 = _T_338 ? f2pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_391 = _T_337 ? f2pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_395 = _T_391 | _T_392; // @[Mux.scala 27:72]
|
wire [30:0] _T_394 = _T_390 | _T_391; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_393 = _T_353 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_392 = _T_352 ? sf1pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_396 = _T_395 | _T_393; // @[Mux.scala 27:72]
|
wire [30:0] _T_395 = _T_394 | _T_392; // @[Mux.scala 27:72]
|
||||||
wire _T_385 = ~fetch_to_f0; // @[el2_ifu_aln_ctl.scala 288:24]
|
wire _T_384 = ~fetch_to_f0; // @[el2_ifu_aln_ctl.scala 288:24]
|
||||||
wire _T_386 = ~_T_338; // @[el2_ifu_aln_ctl.scala 288:39]
|
wire _T_385 = ~_T_337; // @[el2_ifu_aln_ctl.scala 288:39]
|
||||||
wire _T_387 = _T_385 & _T_386; // @[el2_ifu_aln_ctl.scala 288:37]
|
wire _T_386 = _T_384 & _T_385; // @[el2_ifu_aln_ctl.scala 288:37]
|
||||||
wire _T_388 = ~_T_353; // @[el2_ifu_aln_ctl.scala 288:54]
|
wire _T_387 = ~_T_352; // @[el2_ifu_aln_ctl.scala 288:54]
|
||||||
wire _T_389 = _T_387 & _T_388; // @[el2_ifu_aln_ctl.scala 288:52]
|
wire _T_388 = _T_386 & _T_387; // @[el2_ifu_aln_ctl.scala 288:52]
|
||||||
wire [30:0] f0pc_plus1 = f0pc + 31'h1; // @[el2_ifu_aln_ctl.scala 275:25]
|
wire [30:0] f0pc_plus1 = f0pc + 31'h1; // @[el2_ifu_aln_ctl.scala 275:25]
|
||||||
wire [30:0] _T_394 = _T_389 ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_393 = _T_388 ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] f0pc_in = _T_396 | _T_394; // @[Mux.scala 27:72]
|
wire [30:0] f0pc_in = _T_395 | _T_393; // @[Mux.scala 27:72]
|
||||||
wire _T_35 = wrptr == 2'h2; // @[el2_ifu_aln_ctl.scala 161:21]
|
wire _T_35 = wrptr == 2'h2; // @[el2_ifu_aln_ctl.scala 161:21]
|
||||||
wire _T_36 = _T_35 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:29]
|
wire _T_36 = _T_35 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:29]
|
||||||
wire _T_37 = wrptr == 2'h1; // @[el2_ifu_aln_ctl.scala 161:46]
|
wire _T_37 = wrptr == 2'h1; // @[el2_ifu_aln_ctl.scala 161:46]
|
||||||
|
|
@ -726,12 +726,12 @@ module el2_ifu_aln_ctl(
|
||||||
wire _T_40 = _T_39 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:79]
|
wire _T_40 = _T_39 & ifvalid; // @[el2_ifu_aln_ctl.scala 161:79]
|
||||||
wire [2:0] qwen = {_T_36,_T_38,_T_40}; // @[Cat.scala 29:58]
|
wire [2:0] qwen = {_T_36,_T_38,_T_40}; // @[Cat.scala 29:58]
|
||||||
reg [11:0] brdata2; // @[Reg.scala 27:20]
|
reg [11:0] brdata2; // @[Reg.scala 27:20]
|
||||||
wire [5:0] _T_242 = {io_ifu_bp_hist1_f[0],io_ifu_bp_hist0_f[0],io_ifu_bp_pc4_f[0],io_ifu_bp_way_f[0],io_ifu_bp_valid_f[0],io_ifu_bp_ret_f[0]}; // @[Cat.scala 29:58]
|
wire [5:0] _T_241 = {io_ifu_bp_hist1_f[0],io_ifu_bp_hist0_f[0],io_ifu_bp_pc4_f[0],io_ifu_bp_way_f[0],io_ifu_bp_valid_f[0],io_ifu_bp_ret_f[0]}; // @[Cat.scala 29:58]
|
||||||
wire [11:0] brdata_in = {io_ifu_bp_hist1_f[1],io_ifu_bp_hist0_f[1],io_ifu_bp_pc4_f[1],io_ifu_bp_way_f[1],io_ifu_bp_valid_f[1],io_ifu_bp_ret_f[1],_T_242}; // @[Cat.scala 29:58]
|
wire [11:0] brdata_in = {io_ifu_bp_hist1_f[1],io_ifu_bp_hist0_f[1],io_ifu_bp_pc4_f[1],io_ifu_bp_way_f[1],io_ifu_bp_valid_f[1],io_ifu_bp_ret_f[1],_T_241}; // @[Cat.scala 29:58]
|
||||||
reg [11:0] brdata1; // @[Reg.scala 27:20]
|
reg [11:0] brdata1; // @[Reg.scala 27:20]
|
||||||
reg [11:0] brdata0; // @[Reg.scala 27:20]
|
reg [11:0] brdata0; // @[Reg.scala 27:20]
|
||||||
reg [54:0] _T_14; // @[Reg.scala 27:20]
|
reg [54:0] _T_14; // @[Reg.scala 27:20]
|
||||||
wire [54:0] misc_data_in = {io_iccm_rd_ecc_double_err,io_ic_access_fault_f,io_ic_access_fault_type_f,io_ifu_bp_btb_target_f[31:1],io_ifu_bp_poffset_f,io_ifu_bp_fghr_f}; // @[Cat.scala 29:58]
|
wire [54:0] misc_data_in = {io_iccm_rd_ecc_double_err,io_ic_access_fault_f,io_ic_access_fault_type_f,io_ifu_bp_btb_target_f,io_ifu_bp_poffset_f,io_ifu_bp_fghr_f}; // @[Cat.scala 29:58]
|
||||||
reg [54:0] _T_16; // @[Reg.scala 27:20]
|
reg [54:0] _T_16; // @[Reg.scala 27:20]
|
||||||
reg [54:0] _T_18; // @[Reg.scala 27:20]
|
reg [54:0] _T_18; // @[Reg.scala 27:20]
|
||||||
wire _T_44 = qren[0] & io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 163:34]
|
wire _T_44 = qren[0] & io_ifu_fb_consume1; // @[el2_ifu_aln_ctl.scala 163:34]
|
||||||
|
|
@ -766,11 +766,11 @@ module el2_ifu_aln_ctl(
|
||||||
wire [1:0] wrptr_in = _T_113 | _T_112; // @[Mux.scala 27:72]
|
wire [1:0] wrptr_in = _T_113 | _T_112; // @[Mux.scala 27:72]
|
||||||
wire _T_118 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 176:26]
|
wire _T_118 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 176:26]
|
||||||
wire _T_120 = _T_118 & _T_188; // @[el2_ifu_aln_ctl.scala 176:35]
|
wire _T_120 = _T_118 & _T_188; // @[el2_ifu_aln_ctl.scala 176:35]
|
||||||
wire _T_796 = shift_2B & f0val[0]; // @[Mux.scala 27:72]
|
wire _T_795 = shift_2B & f0val[0]; // @[Mux.scala 27:72]
|
||||||
wire _T_793 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 415:77]
|
wire _T_792 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 415:77]
|
||||||
wire _T_795 = _T_793 & f0val[0]; // @[el2_ifu_aln_ctl.scala 415:87]
|
wire _T_794 = _T_792 & f0val[0]; // @[el2_ifu_aln_ctl.scala 415:87]
|
||||||
wire _T_797 = shift_4B & _T_795; // @[Mux.scala 27:72]
|
wire _T_796 = shift_4B & _T_794; // @[Mux.scala 27:72]
|
||||||
wire f0_shift_2B = _T_796 | _T_797; // @[Mux.scala 27:72]
|
wire f0_shift_2B = _T_795 | _T_796; // @[Mux.scala 27:72]
|
||||||
wire _T_122 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 176:74]
|
wire _T_122 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 176:74]
|
||||||
wire _T_126 = _T_118 & _T_187; // @[el2_ifu_aln_ctl.scala 177:15]
|
wire _T_126 = _T_118 & _T_187; // @[el2_ifu_aln_ctl.scala 177:15]
|
||||||
wire _T_128 = q2off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 177:54]
|
wire _T_128 = q2off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 177:54]
|
||||||
|
|
@ -804,15 +804,15 @@ module el2_ifu_aln_ctl(
|
||||||
wire q0off_in = _T_183 | _T_182; // @[Mux.scala 27:72]
|
wire q0off_in = _T_183 | _T_182; // @[Mux.scala 27:72]
|
||||||
wire [53:0] misc1 = _T_16[53:0]; // @[el2_ifu_aln_ctl.scala 149:9]
|
wire [53:0] misc1 = _T_16[53:0]; // @[el2_ifu_aln_ctl.scala 149:9]
|
||||||
wire [53:0] misc0 = _T_18[53:0]; // @[el2_ifu_aln_ctl.scala 150:9]
|
wire [53:0] misc0 = _T_18[53:0]; // @[el2_ifu_aln_ctl.scala 150:9]
|
||||||
wire [107:0] _T_212 = {misc1,misc0}; // @[Cat.scala 29:58]
|
wire [107:0] _T_211 = {misc1,misc0}; // @[Cat.scala 29:58]
|
||||||
wire [53:0] misc2 = _T_14[53:0]; // @[el2_ifu_aln_ctl.scala 148:9]
|
wire [53:0] misc2 = _T_14[53:0]; // @[el2_ifu_aln_ctl.scala 148:9]
|
||||||
wire [107:0] _T_215 = {misc2,misc1}; // @[Cat.scala 29:58]
|
wire [107:0] _T_214 = {misc2,misc1}; // @[Cat.scala 29:58]
|
||||||
wire [107:0] _T_218 = {misc0,misc2}; // @[Cat.scala 29:58]
|
wire [107:0] _T_217 = {misc0,misc2}; // @[Cat.scala 29:58]
|
||||||
wire [107:0] _T_219 = qren[0] ? _T_212 : 108'h0; // @[Mux.scala 27:72]
|
wire [107:0] _T_218 = qren[0] ? _T_211 : 108'h0; // @[Mux.scala 27:72]
|
||||||
wire [107:0] _T_220 = qren[1] ? _T_215 : 108'h0; // @[Mux.scala 27:72]
|
wire [107:0] _T_219 = qren[1] ? _T_214 : 108'h0; // @[Mux.scala 27:72]
|
||||||
wire [107:0] _T_221 = qren[2] ? _T_218 : 108'h0; // @[Mux.scala 27:72]
|
wire [107:0] _T_220 = qren[2] ? _T_217 : 108'h0; // @[Mux.scala 27:72]
|
||||||
wire [107:0] _T_222 = _T_219 | _T_220; // @[Mux.scala 27:72]
|
wire [107:0] _T_221 = _T_218 | _T_219; // @[Mux.scala 27:72]
|
||||||
wire [107:0] misceff = _T_222 | _T_221; // @[Mux.scala 27:72]
|
wire [107:0] misceff = _T_221 | _T_220; // @[Mux.scala 27:72]
|
||||||
wire [52:0] misc1eff = misceff[107:55]; // @[el2_ifu_aln_ctl.scala 205:25]
|
wire [52:0] misc1eff = misceff[107:55]; // @[el2_ifu_aln_ctl.scala 205:25]
|
||||||
wire [54:0] misc0eff = misceff[54:0]; // @[el2_ifu_aln_ctl.scala 206:25]
|
wire [54:0] misc0eff = misceff[54:0]; // @[el2_ifu_aln_ctl.scala 206:25]
|
||||||
wire f1dbecc = misc1eff[52]; // @[el2_ifu_aln_ctl.scala 209:25]
|
wire f1dbecc = misc1eff[52]; // @[el2_ifu_aln_ctl.scala 209:25]
|
||||||
|
|
@ -827,24 +827,24 @@ module el2_ifu_aln_ctl(
|
||||||
wire [32:0] f0prett = misc0eff[50:18]; // @[el2_ifu_aln_ctl.scala 219:25]
|
wire [32:0] f0prett = misc0eff[50:18]; // @[el2_ifu_aln_ctl.scala 219:25]
|
||||||
wire [12:0] f0poffset = misc0eff[17:5]; // @[el2_ifu_aln_ctl.scala 220:27]
|
wire [12:0] f0poffset = misc0eff[17:5]; // @[el2_ifu_aln_ctl.scala 220:27]
|
||||||
wire [4:0] f0fghr = misc0eff[4:0]; // @[el2_ifu_aln_ctl.scala 221:24]
|
wire [4:0] f0fghr = misc0eff[4:0]; // @[el2_ifu_aln_ctl.scala 221:24]
|
||||||
wire [23:0] _T_251 = {brdata1,brdata0}; // @[Cat.scala 29:58]
|
wire [23:0] _T_250 = {brdata1,brdata0}; // @[Cat.scala 29:58]
|
||||||
wire [23:0] _T_254 = {brdata2,brdata1}; // @[Cat.scala 29:58]
|
wire [23:0] _T_253 = {brdata2,brdata1}; // @[Cat.scala 29:58]
|
||||||
wire [23:0] _T_257 = {brdata0,brdata2}; // @[Cat.scala 29:58]
|
wire [23:0] _T_256 = {brdata0,brdata2}; // @[Cat.scala 29:58]
|
||||||
wire [23:0] _T_258 = qren[0] ? _T_251 : 24'h0; // @[Mux.scala 27:72]
|
wire [23:0] _T_257 = qren[0] ? _T_250 : 24'h0; // @[Mux.scala 27:72]
|
||||||
wire [23:0] _T_259 = qren[1] ? _T_254 : 24'h0; // @[Mux.scala 27:72]
|
wire [23:0] _T_258 = qren[1] ? _T_253 : 24'h0; // @[Mux.scala 27:72]
|
||||||
wire [23:0] _T_260 = qren[2] ? _T_257 : 24'h0; // @[Mux.scala 27:72]
|
wire [23:0] _T_259 = qren[2] ? _T_256 : 24'h0; // @[Mux.scala 27:72]
|
||||||
wire [23:0] _T_261 = _T_258 | _T_259; // @[Mux.scala 27:72]
|
wire [23:0] _T_260 = _T_257 | _T_258; // @[Mux.scala 27:72]
|
||||||
wire [23:0] brdataeff = _T_261 | _T_260; // @[Mux.scala 27:72]
|
wire [23:0] brdataeff = _T_260 | _T_259; // @[Mux.scala 27:72]
|
||||||
wire [11:0] brdata0eff = brdataeff[11:0]; // @[el2_ifu_aln_ctl.scala 231:43]
|
wire [11:0] brdata0eff = brdataeff[11:0]; // @[el2_ifu_aln_ctl.scala 231:43]
|
||||||
wire [11:0] brdata1eff = brdataeff[23:12]; // @[el2_ifu_aln_ctl.scala 231:61]
|
wire [11:0] brdata1eff = brdataeff[23:12]; // @[el2_ifu_aln_ctl.scala 231:61]
|
||||||
wire [11:0] _T_268 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
|
wire [11:0] _T_267 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
|
||||||
wire [5:0] _T_269 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
|
wire [5:0] _T_268 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
|
||||||
wire [11:0] _GEN_17 = {{6'd0}, _T_269}; // @[Mux.scala 27:72]
|
wire [11:0] _GEN_17 = {{6'd0}, _T_268}; // @[Mux.scala 27:72]
|
||||||
wire [11:0] brdata0final = _T_268 | _GEN_17; // @[Mux.scala 27:72]
|
wire [11:0] brdata0final = _T_267 | _GEN_17; // @[Mux.scala 27:72]
|
||||||
wire [11:0] _T_276 = q1sel[0] ? brdata1eff : 12'h0; // @[Mux.scala 27:72]
|
wire [11:0] _T_275 = q1sel[0] ? brdata1eff : 12'h0; // @[Mux.scala 27:72]
|
||||||
wire [5:0] _T_277 = q1sel[1] ? brdata1eff[11:6] : 6'h0; // @[Mux.scala 27:72]
|
wire [5:0] _T_276 = q1sel[1] ? brdata1eff[11:6] : 6'h0; // @[Mux.scala 27:72]
|
||||||
wire [11:0] _GEN_18 = {{6'd0}, _T_277}; // @[Mux.scala 27:72]
|
wire [11:0] _GEN_18 = {{6'd0}, _T_276}; // @[Mux.scala 27:72]
|
||||||
wire [11:0] brdata1final = _T_276 | _GEN_18; // @[Mux.scala 27:72]
|
wire [11:0] brdata1final = _T_275 | _GEN_18; // @[Mux.scala 27:72]
|
||||||
wire [1:0] f0ret = {brdata0final[6],brdata0final[0]}; // @[Cat.scala 29:58]
|
wire [1:0] f0ret = {brdata0final[6],brdata0final[0]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] f0brend = {brdata0final[7],brdata0final[1]}; // @[Cat.scala 29:58]
|
wire [1:0] f0brend = {brdata0final[7],brdata0final[1]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] f0way = {brdata0final[8],brdata0final[2]}; // @[Cat.scala 29:58]
|
wire [1:0] f0way = {brdata0final[8],brdata0final[2]}; // @[Cat.scala 29:58]
|
||||||
|
|
@ -857,158 +857,158 @@ module el2_ifu_aln_ctl(
|
||||||
wire [1:0] f1pc4 = {brdata1final[9],brdata1final[3]}; // @[Cat.scala 29:58]
|
wire [1:0] f1pc4 = {brdata1final[9],brdata1final[3]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] f1hist0 = {brdata1final[10],brdata1final[4]}; // @[Cat.scala 29:58]
|
wire [1:0] f1hist0 = {brdata1final[10],brdata1final[4]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] f1hist1 = {brdata1final[11],brdata1final[5]}; // @[Cat.scala 29:58]
|
wire [1:0] f1hist1 = {brdata1final[11],brdata1final[5]}; // @[Cat.scala 29:58]
|
||||||
wire consume_fb0 = _T_352 & f0val[0]; // @[el2_ifu_aln_ctl.scala 255:32]
|
wire consume_fb0 = _T_351 & f0val[0]; // @[el2_ifu_aln_ctl.scala 255:32]
|
||||||
wire consume_fb1 = _T_336 & f1val[0]; // @[el2_ifu_aln_ctl.scala 256:32]
|
wire consume_fb1 = _T_335 & f1val[0]; // @[el2_ifu_aln_ctl.scala 256:32]
|
||||||
wire _T_312 = ~consume_fb1; // @[el2_ifu_aln_ctl.scala 258:39]
|
wire _T_311 = ~consume_fb1; // @[el2_ifu_aln_ctl.scala 258:39]
|
||||||
wire _T_313 = consume_fb0 & _T_312; // @[el2_ifu_aln_ctl.scala 258:37]
|
wire _T_312 = consume_fb0 & _T_311; // @[el2_ifu_aln_ctl.scala 258:37]
|
||||||
wire _T_316 = consume_fb0 & consume_fb1; // @[el2_ifu_aln_ctl.scala 259:37]
|
wire _T_315 = consume_fb0 & consume_fb1; // @[el2_ifu_aln_ctl.scala 259:37]
|
||||||
wire _T_400 = fetch_to_f2 & _T_1; // @[el2_ifu_aln_ctl.scala 290:38]
|
wire _T_399 = fetch_to_f2 & _T_1; // @[el2_ifu_aln_ctl.scala 290:38]
|
||||||
wire _T_402 = ~fetch_to_f2; // @[el2_ifu_aln_ctl.scala 291:25]
|
wire _T_401 = ~fetch_to_f2; // @[el2_ifu_aln_ctl.scala 291:25]
|
||||||
wire _T_404 = _T_402 & _T_373; // @[el2_ifu_aln_ctl.scala 291:38]
|
wire _T_403 = _T_401 & _T_372; // @[el2_ifu_aln_ctl.scala 291:38]
|
||||||
wire _T_406 = _T_404 & _T_386; // @[el2_ifu_aln_ctl.scala 291:53]
|
wire _T_405 = _T_403 & _T_385; // @[el2_ifu_aln_ctl.scala 291:53]
|
||||||
wire _T_408 = _T_406 & _T_1; // @[el2_ifu_aln_ctl.scala 291:68]
|
wire _T_407 = _T_405 & _T_1; // @[el2_ifu_aln_ctl.scala 291:68]
|
||||||
wire [1:0] _T_410 = _T_400 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_409 = _T_399 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_411 = _T_408 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_410 = _T_407 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] f2val_in = _T_410 | _T_411; // @[Mux.scala 27:72]
|
wire [1:0] f2val_in = _T_409 | _T_410; // @[Mux.scala 27:72]
|
||||||
wire _T_423 = fetch_to_f1 & _T_1; // @[el2_ifu_aln_ctl.scala 295:39]
|
wire _T_422 = fetch_to_f1 & _T_1; // @[el2_ifu_aln_ctl.scala 295:39]
|
||||||
wire _T_426 = _T_354 & _T_1; // @[el2_ifu_aln_ctl.scala 296:54]
|
wire _T_425 = _T_353 & _T_1; // @[el2_ifu_aln_ctl.scala 296:54]
|
||||||
wire _T_432 = _T_374 & _T_388; // @[el2_ifu_aln_ctl.scala 297:54]
|
wire _T_431 = _T_373 & _T_387; // @[el2_ifu_aln_ctl.scala 297:54]
|
||||||
wire _T_434 = _T_432 & _T_1; // @[el2_ifu_aln_ctl.scala 297:69]
|
wire _T_433 = _T_431 & _T_1; // @[el2_ifu_aln_ctl.scala 297:69]
|
||||||
wire [1:0] _T_436 = _T_423 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_435 = _T_422 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_437 = _T_426 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_436 = _T_425 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_438 = _T_434 ? sf1val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_437 = _T_433 ? sf1val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_439 = _T_436 | _T_437; // @[Mux.scala 27:72]
|
wire [1:0] _T_438 = _T_435 | _T_436; // @[Mux.scala 27:72]
|
||||||
wire [1:0] f1val_in = _T_439 | _T_438; // @[Mux.scala 27:72]
|
wire [1:0] f1val_in = _T_438 | _T_437; // @[Mux.scala 27:72]
|
||||||
wire _T_454 = fetch_to_f0 & _T_1; // @[el2_ifu_aln_ctl.scala 302:38]
|
wire _T_453 = fetch_to_f0 & _T_1; // @[el2_ifu_aln_ctl.scala 302:38]
|
||||||
wire _T_457 = _T_338 & _T_1; // @[el2_ifu_aln_ctl.scala 303:54]
|
wire _T_456 = _T_337 & _T_1; // @[el2_ifu_aln_ctl.scala 303:54]
|
||||||
wire _T_460 = _T_353 & _T_1; // @[el2_ifu_aln_ctl.scala 304:69]
|
wire _T_459 = _T_352 & _T_1; // @[el2_ifu_aln_ctl.scala 304:69]
|
||||||
wire _T_468 = _T_389 & _T_1; // @[el2_ifu_aln_ctl.scala 305:69]
|
wire _T_467 = _T_388 & _T_1; // @[el2_ifu_aln_ctl.scala 305:69]
|
||||||
wire [1:0] _T_470 = _T_454 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_469 = _T_453 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_471 = _T_457 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_470 = _T_456 ? f2val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_472 = _T_460 ? sf1val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_471 = _T_459 ? sf1val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_473 = _T_468 ? sf0val : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_472 = _T_467 ? sf0val : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_474 = _T_470 | _T_471; // @[Mux.scala 27:72]
|
wire [1:0] _T_473 = _T_469 | _T_470; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_475 = _T_474 | _T_472; // @[Mux.scala 27:72]
|
wire [1:0] _T_474 = _T_473 | _T_471; // @[Mux.scala 27:72]
|
||||||
wire [1:0] f0val_in = _T_475 | _T_473; // @[Mux.scala 27:72]
|
wire [1:0] f0val_in = _T_474 | _T_472; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_531 = {f1val[0],1'h1}; // @[Cat.scala 29:58]
|
wire [1:0] _T_530 = {f1val[0],1'h1}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_532 = f0val[1] ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_531 = f0val[1] ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_533 = _T_516 ? _T_531 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_532 = _T_515 ? _T_530 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] alignval = _T_532 | _T_533; // @[Mux.scala 27:72]
|
wire [1:0] alignval = _T_531 | _T_532; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_543 = {f1icaf,f0icaf}; // @[Cat.scala 29:58]
|
wire [1:0] _T_542 = {f1icaf,f0icaf}; // @[Cat.scala 29:58]
|
||||||
wire _T_544 = f0val[1] & f0icaf; // @[Mux.scala 27:72]
|
wire _T_543 = f0val[1] & f0icaf; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_545 = _T_516 ? _T_543 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_544 = _T_515 ? _T_542 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _GEN_19 = {{1'd0}, _T_544}; // @[Mux.scala 27:72]
|
wire [1:0] _GEN_19 = {{1'd0}, _T_543}; // @[Mux.scala 27:72]
|
||||||
wire [1:0] alignicaf = _GEN_19 | _T_545; // @[Mux.scala 27:72]
|
wire [1:0] alignicaf = _GEN_19 | _T_544; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_550 = f0dbecc ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12]
|
wire [1:0] _T_549 = f0dbecc ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12]
|
||||||
wire [1:0] _T_556 = {f1dbecc,f0dbecc}; // @[Cat.scala 29:58]
|
wire [1:0] _T_555 = {f1dbecc,f0dbecc}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_557 = f0val[1] ? _T_550 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_556 = f0val[1] ? _T_549 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_558 = _T_516 ? _T_556 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_557 = _T_515 ? _T_555 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] aligndbecc = _T_557 | _T_558; // @[Mux.scala 27:72]
|
wire [1:0] aligndbecc = _T_556 | _T_557; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_569 = {f1brend[0],f0brend[0]}; // @[Cat.scala 29:58]
|
wire [1:0] _T_568 = {f1brend[0],f0brend[0]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_570 = f0val[1] ? f0brend : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_569 = f0val[1] ? f0brend : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_571 = _T_516 ? _T_569 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_570 = _T_515 ? _T_568 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] alignbrend = _T_570 | _T_571; // @[Mux.scala 27:72]
|
wire [1:0] alignbrend = _T_569 | _T_570; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_582 = {f1pc4[0],f0pc4[0]}; // @[Cat.scala 29:58]
|
wire [1:0] _T_581 = {f1pc4[0],f0pc4[0]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_583 = f0val[1] ? f0pc4 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_582 = f0val[1] ? f0pc4 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_584 = _T_516 ? _T_582 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_583 = _T_515 ? _T_581 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] alignpc4 = _T_583 | _T_584; // @[Mux.scala 27:72]
|
wire [1:0] alignpc4 = _T_582 | _T_583; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_595 = {f1ret[0],f0ret[0]}; // @[Cat.scala 29:58]
|
wire [1:0] _T_594 = {f1ret[0],f0ret[0]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_596 = f0val[1] ? f0ret : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_595 = f0val[1] ? f0ret : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_597 = _T_516 ? _T_595 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_596 = _T_515 ? _T_594 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] alignret = _T_596 | _T_597; // @[Mux.scala 27:72]
|
wire [1:0] alignret = _T_595 | _T_596; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_608 = {f1way[0],f0way[0]}; // @[Cat.scala 29:58]
|
wire [1:0] _T_607 = {f1way[0],f0way[0]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_609 = f0val[1] ? f0way : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_608 = f0val[1] ? f0way : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_610 = _T_516 ? _T_608 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_609 = _T_515 ? _T_607 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] alignway = _T_609 | _T_610; // @[Mux.scala 27:72]
|
wire [1:0] alignway = _T_608 | _T_609; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_621 = {f1hist1[0],f0hist1[0]}; // @[Cat.scala 29:58]
|
wire [1:0] _T_620 = {f1hist1[0],f0hist1[0]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_622 = f0val[1] ? f0hist1 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_621 = f0val[1] ? f0hist1 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_623 = _T_516 ? _T_621 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_622 = _T_515 ? _T_620 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] alignhist1 = _T_622 | _T_623; // @[Mux.scala 27:72]
|
wire [1:0] alignhist1 = _T_621 | _T_622; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_634 = {f1hist0[0],f0hist0[0]}; // @[Cat.scala 29:58]
|
wire [1:0] _T_633 = {f1hist0[0],f0hist0[0]}; // @[Cat.scala 29:58]
|
||||||
wire [1:0] _T_635 = f0val[1] ? f0hist0 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_634 = f0val[1] ? f0hist0 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] _T_636 = _T_516 ? _T_634 : 2'h0; // @[Mux.scala 27:72]
|
wire [1:0] _T_635 = _T_515 ? _T_633 : 2'h0; // @[Mux.scala 27:72]
|
||||||
wire [1:0] alignhist0 = _T_635 | _T_636; // @[Mux.scala 27:72]
|
wire [1:0] alignhist0 = _T_634 | _T_635; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_648 = f0val[1] ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_647 = f0val[1] ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] _T_649 = _T_516 ? f1pc : 31'h0; // @[Mux.scala 27:72]
|
wire [30:0] _T_648 = _T_515 ? f1pc : 31'h0; // @[Mux.scala 27:72]
|
||||||
wire [30:0] secondpc = _T_648 | _T_649; // @[Mux.scala 27:72]
|
wire [30:0] secondpc = _T_647 | _T_648; // @[Mux.scala 27:72]
|
||||||
wire _T_658 = first4B & alignval[1]; // @[Mux.scala 27:72]
|
wire _T_657 = first4B & alignval[1]; // @[Mux.scala 27:72]
|
||||||
wire _T_659 = first2B & alignval[0]; // @[Mux.scala 27:72]
|
wire _T_658 = first2B & alignval[0]; // @[Mux.scala 27:72]
|
||||||
wire _T_663 = |alignicaf; // @[el2_ifu_aln_ctl.scala 354:59]
|
wire _T_662 = |alignicaf; // @[el2_ifu_aln_ctl.scala 354:59]
|
||||||
wire _T_666 = first4B & _T_663; // @[Mux.scala 27:72]
|
wire _T_665 = first4B & _T_662; // @[Mux.scala 27:72]
|
||||||
wire _T_667 = first2B & alignicaf[0]; // @[Mux.scala 27:72]
|
wire _T_666 = first2B & alignicaf[0]; // @[Mux.scala 27:72]
|
||||||
wire _T_672 = first4B & _T_514; // @[el2_ifu_aln_ctl.scala 356:39]
|
wire _T_671 = first4B & _T_513; // @[el2_ifu_aln_ctl.scala 356:39]
|
||||||
wire _T_674 = _T_672 & f0val[0]; // @[el2_ifu_aln_ctl.scala 356:51]
|
wire _T_673 = _T_671 & f0val[0]; // @[el2_ifu_aln_ctl.scala 356:51]
|
||||||
wire _T_676 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 356:64]
|
wire _T_675 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 356:64]
|
||||||
wire _T_677 = _T_674 & _T_676; // @[el2_ifu_aln_ctl.scala 356:62]
|
wire _T_676 = _T_673 & _T_675; // @[el2_ifu_aln_ctl.scala 356:62]
|
||||||
wire _T_679 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 356:80]
|
wire _T_678 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 356:80]
|
||||||
wire _T_680 = _T_677 & _T_679; // @[el2_ifu_aln_ctl.scala 356:78]
|
wire _T_679 = _T_676 & _T_678; // @[el2_ifu_aln_ctl.scala 356:78]
|
||||||
wire icaf_eff = alignicaf[1] | aligndbecc[1]; // @[el2_ifu_aln_ctl.scala 358:31]
|
wire icaf_eff = alignicaf[1] | aligndbecc[1]; // @[el2_ifu_aln_ctl.scala 358:31]
|
||||||
wire _T_685 = first4B & icaf_eff; // @[el2_ifu_aln_ctl.scala 360:32]
|
wire _T_684 = first4B & icaf_eff; // @[el2_ifu_aln_ctl.scala 360:32]
|
||||||
wire _T_688 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 362:59]
|
wire _T_687 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 362:59]
|
||||||
wire _T_691 = first4B & _T_688; // @[Mux.scala 27:72]
|
wire _T_690 = first4B & _T_687; // @[Mux.scala 27:72]
|
||||||
wire _T_692 = first2B & aligndbecc[0]; // @[Mux.scala 27:72]
|
wire _T_691 = first2B & aligndbecc[0]; // @[Mux.scala 27:72]
|
||||||
wire [31:0] _T_697 = first4B ? aligndata : 32'h0; // @[Mux.scala 27:72]
|
wire [31:0] _T_696 = first4B ? aligndata : 32'h0; // @[Mux.scala 27:72]
|
||||||
wire [31:0] _T_698 = first2B ? decompressed_io_dout : 32'h0; // @[Mux.scala 27:72]
|
wire [31:0] _T_697 = first2B ? decompressed_io_dout : 32'h0; // @[Mux.scala 27:72]
|
||||||
wire [7:0] _T_703 = f0pc[8:1] ^ f0pc[16:9]; // @[el2_lib.scala 191:46]
|
wire [7:0] _T_702 = f0pc[8:1] ^ f0pc[16:9]; // @[el2_lib.scala 191:46]
|
||||||
wire [7:0] firstpc_hash = _T_703 ^ f0pc[24:17]; // @[el2_lib.scala 191:84]
|
wire [7:0] firstpc_hash = _T_702 ^ f0pc[24:17]; // @[el2_lib.scala 191:84]
|
||||||
wire [7:0] _T_707 = secondpc[8:1] ^ secondpc[16:9]; // @[el2_lib.scala 191:46]
|
wire [7:0] _T_706 = secondpc[8:1] ^ secondpc[16:9]; // @[el2_lib.scala 191:46]
|
||||||
wire [7:0] secondpc_hash = _T_707 ^ secondpc[24:17]; // @[el2_lib.scala 191:84]
|
wire [7:0] secondpc_hash = _T_706 ^ secondpc[24:17]; // @[el2_lib.scala 191:84]
|
||||||
wire [4:0] _T_713 = f0pc[13:9] ^ f0pc[18:14]; // @[el2_lib.scala 182:111]
|
wire [4:0] _T_712 = f0pc[13:9] ^ f0pc[18:14]; // @[el2_lib.scala 182:111]
|
||||||
wire [4:0] firstbrtag_hash = _T_713 ^ f0pc[23:19]; // @[el2_lib.scala 182:111]
|
wire [4:0] firstbrtag_hash = _T_712 ^ f0pc[23:19]; // @[el2_lib.scala 182:111]
|
||||||
wire [4:0] _T_718 = secondpc[13:9] ^ secondpc[18:14]; // @[el2_lib.scala 182:111]
|
wire [4:0] _T_717 = secondpc[13:9] ^ secondpc[18:14]; // @[el2_lib.scala 182:111]
|
||||||
wire [4:0] secondbrtag_hash = _T_718 ^ secondpc[23:19]; // @[el2_lib.scala 182:111]
|
wire [4:0] secondbrtag_hash = _T_717 ^ secondpc[23:19]; // @[el2_lib.scala 182:111]
|
||||||
wire _T_720 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:30]
|
wire _T_719 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:30]
|
||||||
wire _T_722 = first4B & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 378:58]
|
wire _T_721 = first4B & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 378:58]
|
||||||
wire _T_723 = _T_720 | _T_722; // @[el2_ifu_aln_ctl.scala 378:47]
|
wire _T_722 = _T_719 | _T_721; // @[el2_ifu_aln_ctl.scala 378:47]
|
||||||
wire _T_727 = _T_658 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:100]
|
wire _T_726 = _T_657 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:100]
|
||||||
wire _T_730 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 380:29]
|
wire _T_729 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 380:29]
|
||||||
wire _T_732 = first4B & alignret[1]; // @[el2_ifu_aln_ctl.scala 380:55]
|
wire _T_731 = first4B & alignret[1]; // @[el2_ifu_aln_ctl.scala 380:55]
|
||||||
wire _T_735 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 382:29]
|
wire _T_734 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 382:29]
|
||||||
wire _T_737 = first4B & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 382:55]
|
wire _T_736 = first4B & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 382:55]
|
||||||
wire i0_brp_pc4 = _T_735 | _T_737; // @[el2_ifu_aln_ctl.scala 382:44]
|
wire i0_brp_pc4 = _T_734 | _T_736; // @[el2_ifu_aln_ctl.scala 382:44]
|
||||||
wire _T_739 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 384:33]
|
wire _T_738 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 384:33]
|
||||||
wire _T_745 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 386:34]
|
wire _T_744 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 386:34]
|
||||||
wire _T_747 = first4B & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 386:62]
|
wire _T_746 = first4B & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 386:62]
|
||||||
wire _T_748 = _T_745 | _T_747; // @[el2_ifu_aln_ctl.scala 386:51]
|
wire _T_747 = _T_744 | _T_746; // @[el2_ifu_aln_ctl.scala 386:51]
|
||||||
wire _T_750 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 387:14]
|
wire _T_749 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 387:14]
|
||||||
wire _T_752 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 387:42]
|
wire _T_751 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 387:42]
|
||||||
wire _T_753 = _T_750 | _T_752; // @[el2_ifu_aln_ctl.scala 387:31]
|
wire _T_752 = _T_749 | _T_751; // @[el2_ifu_aln_ctl.scala 387:31]
|
||||||
wire i0_ends_f1 = first4B & _T_516; // @[el2_ifu_aln_ctl.scala 389:28]
|
wire i0_ends_f1 = first4B & _T_515; // @[el2_ifu_aln_ctl.scala 389:28]
|
||||||
wire [12:0] _T_756 = i0_ends_f1 ? {{1'd0}, f1poffset} : f0poffset; // @[el2_ifu_aln_ctl.scala 390:27]
|
wire [12:0] _T_755 = i0_ends_f1 ? {{1'd0}, f1poffset} : f0poffset; // @[el2_ifu_aln_ctl.scala 390:27]
|
||||||
wire [32:0] _T_758 = i0_ends_f1 ? {{2'd0}, f1prett} : f0prett; // @[el2_ifu_aln_ctl.scala 392:25]
|
wire [32:0] _T_757 = i0_ends_f1 ? {{2'd0}, f1prett} : f0prett; // @[el2_ifu_aln_ctl.scala 392:25]
|
||||||
wire _T_769 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:42]
|
wire _T_768 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:42]
|
||||||
wire _T_770 = _T_769 & first2B; // @[el2_ifu_aln_ctl.scala 398:56]
|
wire _T_769 = _T_768 & first2B; // @[el2_ifu_aln_ctl.scala 398:56]
|
||||||
wire _T_771 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:89]
|
wire _T_770 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:89]
|
||||||
wire _T_772 = io_i0_brp_valid & _T_771; // @[el2_ifu_aln_ctl.scala 398:87]
|
wire _T_771 = io_i0_brp_valid & _T_770; // @[el2_ifu_aln_ctl.scala 398:87]
|
||||||
wire _T_773 = _T_772 & first4B; // @[el2_ifu_aln_ctl.scala 398:101]
|
wire _T_772 = _T_771 & first4B; // @[el2_ifu_aln_ctl.scala 398:101]
|
||||||
el2_ifu_compress_ctl decompressed ( // @[el2_ifu_aln_ctl.scala 366:28]
|
el2_ifu_compress_ctl decompressed ( // @[el2_ifu_aln_ctl.scala 366:28]
|
||||||
.io_din(decompressed_io_din),
|
.io_din(decompressed_io_din),
|
||||||
.io_dout(decompressed_io_dout)
|
.io_dout(decompressed_io_dout)
|
||||||
);
|
);
|
||||||
assign io_ifu_i0_valid = _T_658 | _T_659; // @[el2_ifu_aln_ctl.scala 47:19 el2_ifu_aln_ctl.scala 352:19]
|
assign io_ifu_i0_valid = _T_657 | _T_658; // @[el2_ifu_aln_ctl.scala 47:19 el2_ifu_aln_ctl.scala 352:19]
|
||||||
assign io_ifu_i0_icaf = _T_666 | _T_667; // @[el2_ifu_aln_ctl.scala 48:18 el2_ifu_aln_ctl.scala 354:18]
|
assign io_ifu_i0_icaf = _T_665 | _T_666; // @[el2_ifu_aln_ctl.scala 48:18 el2_ifu_aln_ctl.scala 354:18]
|
||||||
assign io_ifu_i0_icaf_type = _T_680 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 49:23 el2_ifu_aln_ctl.scala 356:23]
|
assign io_ifu_i0_icaf_type = _T_679 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 49:23 el2_ifu_aln_ctl.scala 356:23]
|
||||||
assign io_ifu_i0_icaf_f1 = _T_685 & _T_516; // @[el2_ifu_aln_ctl.scala 50:21 el2_ifu_aln_ctl.scala 360:21]
|
assign io_ifu_i0_icaf_f1 = _T_684 & _T_515; // @[el2_ifu_aln_ctl.scala 50:21 el2_ifu_aln_ctl.scala 360:21]
|
||||||
assign io_ifu_i0_dbecc = _T_691 | _T_692; // @[el2_ifu_aln_ctl.scala 51:19 el2_ifu_aln_ctl.scala 362:19]
|
assign io_ifu_i0_dbecc = _T_690 | _T_691; // @[el2_ifu_aln_ctl.scala 51:19 el2_ifu_aln_ctl.scala 362:19]
|
||||||
assign io_ifu_i0_instr = _T_697 | _T_698; // @[el2_ifu_aln_ctl.scala 52:19 el2_ifu_aln_ctl.scala 368:19]
|
assign io_ifu_i0_instr = _T_696 | _T_697; // @[el2_ifu_aln_ctl.scala 52:19 el2_ifu_aln_ctl.scala 368:19]
|
||||||
assign io_ifu_i0_pc = f0pc; // @[el2_ifu_aln_ctl.scala 53:16 el2_ifu_aln_ctl.scala 340:16]
|
assign io_ifu_i0_pc = f0pc; // @[el2_ifu_aln_ctl.scala 53:16 el2_ifu_aln_ctl.scala 340:16]
|
||||||
assign io_ifu_i0_pc4 = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 54:17 el2_ifu_aln_ctl.scala 344:17]
|
assign io_ifu_i0_pc4 = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 54:17 el2_ifu_aln_ctl.scala 344:17]
|
||||||
assign io_ifu_fb_consume1 = _T_313 & _T_1; // @[el2_ifu_aln_ctl.scala 55:22 el2_ifu_aln_ctl.scala 258:22]
|
assign io_ifu_fb_consume1 = _T_312 & _T_1; // @[el2_ifu_aln_ctl.scala 55:22 el2_ifu_aln_ctl.scala 258:22]
|
||||||
assign io_ifu_fb_consume2 = _T_316 & _T_1; // @[el2_ifu_aln_ctl.scala 56:22 el2_ifu_aln_ctl.scala 259:22]
|
assign io_ifu_fb_consume2 = _T_315 & _T_1; // @[el2_ifu_aln_ctl.scala 56:22 el2_ifu_aln_ctl.scala 259:22]
|
||||||
assign io_ifu_i0_bp_index = _T_739 ? firstpc_hash : secondpc_hash; // @[el2_ifu_aln_ctl.scala 57:22 el2_ifu_aln_ctl.scala 400:22]
|
assign io_ifu_i0_bp_index = _T_738 ? firstpc_hash : secondpc_hash; // @[el2_ifu_aln_ctl.scala 57:22 el2_ifu_aln_ctl.scala 400:22]
|
||||||
assign io_ifu_i0_bp_fghr = i0_ends_f1 ? f1fghr : {{3'd0}, f0fghr}; // @[el2_ifu_aln_ctl.scala 58:21 el2_ifu_aln_ctl.scala 402:21]
|
assign io_ifu_i0_bp_fghr = i0_ends_f1 ? f1fghr : {{3'd0}, f0fghr}; // @[el2_ifu_aln_ctl.scala 58:21 el2_ifu_aln_ctl.scala 402:21]
|
||||||
assign io_ifu_i0_bp_btag = _T_739 ? firstbrtag_hash : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 59:21 el2_ifu_aln_ctl.scala 404:21]
|
assign io_ifu_i0_bp_btag = _T_738 ? firstbrtag_hash : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 59:21 el2_ifu_aln_ctl.scala 404:21]
|
||||||
assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_786; // @[el2_ifu_aln_ctl.scala 60:28 el2_ifu_aln_ctl.scala 410:28]
|
assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_785; // @[el2_ifu_aln_ctl.scala 60:28 el2_ifu_aln_ctl.scala 410:28]
|
||||||
assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 61:19 el2_ifu_aln_ctl.scala 346:19]
|
assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 61:19 el2_ifu_aln_ctl.scala 346:19]
|
||||||
assign io_i0_brp_valid = _T_723 | _T_727; // @[el2_ifu_aln_ctl.scala 378:19]
|
assign io_i0_brp_valid = _T_722 | _T_726; // @[el2_ifu_aln_ctl.scala 378:19]
|
||||||
assign io_i0_brp_toffset = _T_756[11:0]; // @[el2_ifu_aln_ctl.scala 390:21]
|
assign io_i0_brp_toffset = _T_755[11:0]; // @[el2_ifu_aln_ctl.scala 390:21]
|
||||||
assign io_i0_brp_hist = {_T_748,_T_753}; // @[el2_ifu_aln_ctl.scala 386:18]
|
assign io_i0_brp_hist = {_T_747,_T_752}; // @[el2_ifu_aln_ctl.scala 386:18]
|
||||||
assign io_i0_brp_br_error = _T_770 | _T_773; // @[el2_ifu_aln_ctl.scala 398:22]
|
assign io_i0_brp_br_error = _T_769 | _T_772; // @[el2_ifu_aln_ctl.scala 398:22]
|
||||||
assign io_i0_brp_br_start_error = _T_658 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 394:29]
|
assign io_i0_brp_br_start_error = _T_657 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 394:29]
|
||||||
assign io_i0_brp_bank = _T_739 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 396:29]
|
assign io_i0_brp_bank = _T_738 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 396:29]
|
||||||
assign io_i0_brp_prett = _T_758[30:0]; // @[el2_ifu_aln_ctl.scala 392:19]
|
assign io_i0_brp_prett = _T_757[30:0]; // @[el2_ifu_aln_ctl.scala 392:19]
|
||||||
assign io_i0_brp_way = _T_739 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 384:17]
|
assign io_i0_brp_way = _T_738 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 384:17]
|
||||||
assign io_i0_brp_ret = _T_730 | _T_732; // @[el2_ifu_aln_ctl.scala 380:17]
|
assign io_i0_brp_ret = _T_729 | _T_731; // @[el2_ifu_aln_ctl.scala 380:17]
|
||||||
assign decompressed_io_din = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 406:23]
|
assign decompressed_io_din = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 406:23]
|
||||||
`ifdef RANDOMIZE_GARBAGE_ASSIGN
|
`ifdef RANDOMIZE_GARBAGE_ASSIGN
|
||||||
`define RANDOMIZE
|
`define RANDOMIZE
|
||||||
|
|
|
||||||
|
|
@ -13,7 +13,7 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
|
||||||
val ic_access_fault_f = Input(Bool())
|
val ic_access_fault_f = Input(Bool())
|
||||||
val ic_access_fault_type_f = Input(UInt(2.W))
|
val ic_access_fault_type_f = Input(UInt(2.W))
|
||||||
val ifu_bp_fghr_f = Input(UInt(BHT_GHR_SIZE.W))
|
val ifu_bp_fghr_f = Input(UInt(BHT_GHR_SIZE.W))
|
||||||
val ifu_bp_btb_target_f = Input(UInt(32.W))
|
val ifu_bp_btb_target_f = Input(UInt(31.W))
|
||||||
val ifu_bp_poffset_f = Input(UInt(12.W))
|
val ifu_bp_poffset_f = Input(UInt(12.W))
|
||||||
val ifu_bp_hist0_f = Input(UInt(2.W))
|
val ifu_bp_hist0_f = Input(UInt(2.W))
|
||||||
val ifu_bp_hist1_f = Input(UInt(2.W))
|
val ifu_bp_hist1_f = Input(UInt(2.W))
|
||||||
|
|
@ -196,7 +196,7 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
|
||||||
val q1sel = Cat(q1ptr, !q1ptr)
|
val q1sel = Cat(q1ptr, !q1ptr)
|
||||||
|
|
||||||
misc_data_in := Cat(io.iccm_rd_ecc_double_err, io.ic_access_fault_f, io.ic_access_fault_type_f,
|
misc_data_in := Cat(io.iccm_rd_ecc_double_err, io.ic_access_fault_f, io.ic_access_fault_type_f,
|
||||||
io.ifu_bp_btb_target_f(31,1), io.ifu_bp_poffset_f, io.ifu_bp_fghr_f)
|
io.ifu_bp_btb_target_f, io.ifu_bp_poffset_f, io.ifu_bp_fghr_f)
|
||||||
|
|
||||||
val misceff = Mux1H(Seq(qren(0).asBool() -> Cat(misc1, misc0),
|
val misceff = Mux1H(Seq(qren(0).asBool() -> Cat(misc1, misc0),
|
||||||
qren(1).asBool()->Cat(misc2, misc1),
|
qren(1).asBool()->Cat(misc2, misc1),
|
||||||
|
|
|
||||||
Binary file not shown.
Binary file not shown.
Loading…
Reference in New Issue