5fd120b2dd
need boost library
2021-02-21 13:57:04 +01:00
d4511b5f0c
enable debug
2021-02-21 13:51:33 +01:00
597dec2277
remove duplicated switch
2021-02-21 13:51:01 +01:00
49103e5591
Prepare for debug
2021-02-21 13:49:05 +01:00
4c60d6ae75
Prepare for debug
2021-02-21 13:48:41 +01:00
5927dade4d
check memory boundaries
2021-02-21 13:47:06 +01:00
ef6fe88b9c
more warnings
2021-02-02 20:02:49 +01:00
9b7b5635d2
removed CPU64 files (unused)
2021-02-02 19:56:14 +01:00
db682f6055
removed typedef, use default_time instead of fixed time
2021-02-02 19:53:18 +01:00
6286c640d9
Remove unused methods
2021-02-02 19:52:39 +01:00
03c95d2de3
removed duplicate code
2021-02-01 12:24:25 +01:00
22b7ec4c03
remove duplicated methods
2021-02-01 11:49:38 +01:00
cc9045341d
override keyword to virtual methods
2021-02-01 11:25:04 +01:00
b3b00ac7f3
more performance metrics output
2021-02-01 11:24:53 +01:00
1d1b6de616
reduce scope variables
2021-01-31 12:09:15 +01:00
622da9872a
added performace information for data memory accesses
2021-01-31 12:00:25 +01:00
337e267218
remove unused trace output from destructor
2021-01-31 11:59:56 +01:00
86b98209ce
exit cleanup, now closes xterm window, etc.
2021-01-31 11:38:57 +01:00
a48e552926
some methods now are const, reference class parameters, other minor changes
2021-01-23 11:44:10 +01:00
cb63c65d7f
Implemented C_EBREAK instruction
2021-01-18 09:14:54 +01:00
286dbf07a6
added const keyword to const methods
2021-01-17 15:40:47 +01:00
a019de5eb3
reduce variable scope
2021-01-15 15:51:03 +01:00
2ca86d4688
array init
2021-01-15 15:16:56 +01:00
3bf210556e
fixed initialization array error
2021-01-15 10:27:14 +01:00
9636a53624
Merge branch 'master' of https://github.com/mariusmm/RISC-V-TLM
2021-01-15 10:24:31 +01:00
63dfb0f5f1
more warnings
2021-01-15 10:15:08 +01:00
39bb40f189
Fix create directory
2021-01-15 10:14:49 +01:00
f7dbf106cc
trivial changes to increase performance
2021-01-15 09:09:52 +01:00
a713e13705
missing header
2020-12-10 19:34:57 +01:00
a3ad14b670
Replaced std::endl by \n for Log performance
2020-12-10 18:02:42 +01:00
1e9ca5c4e3
documentation
2020-11-12 11:02:26 +01:00
1d271cbb0a
explicit sc_core::wait, typos and newline
2020-07-19 11:18:58 +02:00
d278b1e0a5
Added ecall to asm example files as commented in issue #7
2020-07-17 17:04:05 +02:00
04aa12e42d
fix issue #5
2020-07-10 16:48:29 +02:00
abf47625a1
change fixed array for CSR to unordered map
2020-06-21 00:29:45 +02:00
5b91897244
added likely, unlikely attributes to switch case, could boost perfomance
2020-06-21 00:22:51 +02:00
9feda996e6
Merge branch 'master' of https://github.com/mariusmm/RISC-V-TLM
2020-06-20 11:22:39 +02:00
376d3e9e4f
better container class
2020-06-20 11:22:22 +02:00
3cfbdcf6b8
cpp rtti examples
2020-06-11 10:23:35 +02:00
03a228b020
cpp rtti examples
2020-06-11 10:23:20 +02:00
7867d7c592
fixed Makefile to work with cpp files
2020-06-11 09:29:06 +02:00
7ddacbfe1e
C++ example
2020-06-11 09:24:48 +02:00
c33524e726
fixed log condition
2020-06-11 09:23:59 +02:00
5ee634e4b4
Major refactoring!
...
* A_Instruction, C_Instruction and M_Instruction renamed to *_extension
* These files decode and executes extensions
* These classes use a new base clase extension_base
* Execute & Instruction classes heavyly modified:
* Execute now is BASE_ISA and decodes and executes base ISA, Zicsr & Zifencei
* Instruction keeps the instruction being executed, nothing else
* Add memory interface to ISS to clear the code and the structure
* Removed "using namespace " directives, all classes are called using their namespace
* Added proper header to each file
* Added license to all files
2020-06-02 13:08:38 +02:00
9a46e9d0a5
add missing break for case
2020-05-29 16:03:45 +02:00
95b9685ad9
removed creation of class every CPU loop. It should get better performance
2020-05-28 17:18:50 +02:00
4838205aba
FreeRTOS test project
2020-05-28 11:23:43 +02:00
16b86bfe14
add authors and credits
2020-05-26 10:55:12 +02:00
5968a12e5f
typo
2020-05-24 21:04:39 +02:00
7d0620fb9a
add CARRV paper
2020-05-24 21:03:50 +02:00
mariusmonton