Màrius Montón
|
d575410a06
|
if condition clarified
|
2019-09-24 11:12:47 +02:00 |
|
Màrius Montón
|
5f0da6b208
|
fixed potential bug on memcpy
|
2019-09-24 11:02:15 +02:00 |
|
Màrius Montón
|
916ab46907
|
print out test result at the end of simulation
|
2019-09-10 12:36:45 +02:00 |
|
Màrius Montón
|
d63d95f634
|
fixed bug related DMI access when memory offset != 0
|
2019-09-10 12:24:46 +02:00 |
|
Màrius Montón
|
1bb3200eb6
|
add destructor for clean exit
|
2019-09-08 11:42:05 +02:00 |
|
Màrius Montón
|
1babf6cb88
|
added sc_stop at the end of the simulation to call destructors
|
2019-09-08 11:41:30 +02:00 |
|
Màrius Montón
|
0415ba3c66
|
added xterm window for trace output
|
2019-09-08 11:41:06 +02:00 |
|
mariusmonton
|
d42d67b991
|
DMI access added (if available)
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2019-03-28 22:52:36 +01:00 |
|
mariusmonton
|
5ad8ced434
|
better log for CSRRW instruction
|
2019-02-18 13:57:24 +01:00 |
|
mariusmonton
|
a275e0fa24
|
better support to IRQs
|
2019-02-18 13:56:47 +01:00 |
|
mariusmonton
|
e31eae3f9e
|
added command line arguments
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2019-02-12 14:08:40 +01:00 |
|
mariusmonton
|
1d4c3ec553
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removed unused code
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2019-02-12 11:40:25 +01:00 |
|
mariusmonton
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d62892e3dc
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minor changes, better code
|
2019-02-11 20:26:23 +01:00 |
|
mariusmonton
|
a87743b92d
|
minor changes
|
2019-02-11 15:54:13 +01:00 |
|
mariusmonton
|
2c93492ab1
|
enhanced IRQ support
|
2019-02-11 15:54:02 +01:00 |
|
mariusmonton
|
4c89c48fb0
|
removed SP init, moved to CPU module
|
2019-01-22 18:30:09 +01:00 |
|
mariusmonton
|
d83a15eec5
|
change log level
|
2019-01-22 12:47:54 +01:00 |
|
mariusmonton
|
098aebc15d
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changed IRQ line to TLM socket
|
2019-01-22 12:43:05 +01:00 |
|
mariusmonton
|
0c25abdb00
|
Fixed bug
|
2019-01-22 12:33:32 +01:00 |
|
mariusmonton
|
7c263419a8
|
documentation
|
2019-01-13 18:39:35 +01:00 |
|
mariusmonton
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a4a1be7386
|
IRQ implemented
|
2019-01-13 01:30:49 +01:00 |
|
mariusmonton
|
9a7e7abeb0
|
Better logs
Fixed some bugs
|
2019-01-01 21:11:34 +01:00 |
|
mariusmonton
|
5c905cb5ca
|
better MISA CSR register support
|
2018-12-12 18:15:44 +01:00 |
|
mariusmonton
|
93fe2237b4
|
better support to hex file
|
2018-12-12 18:15:21 +01:00 |
|
mariusmonton
|
a2a9c95546
|
Added A Extensions
Added SFENCE instruction
|
2018-12-12 18:14:35 +01:00 |
|
mariusmonton
|
1b93e7f569
|
added time management and cycle counters
|
2018-11-25 12:07:08 +01:00 |
|
mariusmonton
|
81f61c52fc
|
fixed dump function!
|
2018-11-25 12:05:09 +01:00 |
|
mariusmonton
|
0f291016c5
|
add support to RaiseExecption to all instructions
|
2018-11-24 23:46:47 +01:00 |
|
mariusmonton
|
4114f482d6
|
Doxygen
|
2018-11-24 23:46:01 +01:00 |
|
mariusmonton
|
d5489523de
|
better log output
|
2018-11-22 16:53:26 +01:00 |
|
mariusmonton
|
c832b2f80f
|
all tests passed!
|
2018-11-22 16:42:06 +01:00 |
|
mariusmonton
|
b9e26e4dea
|
first implementation supporting exceptions
|
2018-11-22 14:38:31 +01:00 |
|
mariusmonton
|
6726b59c3c
|
bug on SLLI
|
2018-11-22 12:39:16 +01:00 |
|
mariusmonton
|
0cd34f9f3b
|
fixed CSRRS and CSRRC bug
|
2018-11-22 12:08:16 +01:00 |
|
mariusmonton
|
9cd354b822
|
C examples halts simulation
|
2018-11-19 17:22:18 +01:00 |
|
mariusmonton
|
ed7be704f9
|
implementation of all remaining C extension
|
2018-11-19 15:56:08 +01:00 |
|
mariusmonton
|
3f7ecfa9df
|
bug fixes
|
2018-11-14 23:50:01 +01:00 |
|
mariusmonton
|
adc30178ab
|
fixed detection of M extension
|
2018-11-14 23:14:06 +01:00 |
|
mariusmonton
|
a8bdc37c12
|
all tests passed!
|
2018-11-14 19:14:57 +01:00 |
|
mariusmonton
|
d449ea5502
|
adding M extensions to simulator
|
2018-11-12 17:41:17 +01:00 |
|
mariusmonton
|
bdf261cbc6
|
default value to variable to remove a warning
|
2018-11-12 17:08:26 +01:00 |
|
mariusmonton
|
1fcbcf500b
|
typos 6 minor changes
|
2018-11-11 11:12:12 +01:00 |
|
mariusmonton
|
36646a182e
|
buf, intermediate value whould be 32 bits long
|
2018-11-08 18:55:47 +01:00 |
|
mariusmonton
|
9d7d84c7f8
|
bugs!
|
2018-11-07 18:43:10 +01:00 |
|
mariusmonton
|
598699cd54
|
more bug fixes, still get j zero in func3 test example
|
2018-10-17 17:42:43 +02:00 |
|
mariusmonton
|
374b853117
|
first version of C.extensions
|
2018-10-15 17:35:16 +02:00 |
|
mariusmonton
|
97b15ca7a3
|
better (?) Log output
|
2018-10-15 17:34:42 +02:00 |
|
mariusmonton
|
a409f48d40
|
Fixed wrong immediate accesses
|
2018-10-15 17:33:41 +02:00 |
|
mariusmonton
|
5ae765b304
|
Proper initialization of sp register
|
2018-10-15 17:32:37 +02:00 |
|
mariusmonton
|
aa526943b9
|
Added instructions to pass riscv-tests
|
2018-10-15 13:51:41 +02:00 |