Luke Wren
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a536e3baa7
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rvcpp sim: add A extension and M-mode traps
(now passes a lot of the Hazard3 tests)
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2023-04-01 08:21:43 +01:00 |
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Luke Wren
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26d699e18c
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rvcpp simulator: fix bad regnum decode for c.slli outside of x8..x15
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2023-04-01 06:02:45 +01:00 |
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Luke Wren
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8f461b63b4
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Fix mvsa01/mva01s in rvcpp
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2023-03-21 21:54:04 +00:00 |
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Luke Wren
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410d002372
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First pass at adding Zcmp to rvcpp
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2023-03-21 21:28:49 +00:00 |
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Luke Wren
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8e7e8f4008
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Extend rvcpp ISA sim to cover RVC. Passes RV32IC compliance.
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2023-03-21 19:38:46 +00:00 |
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Luke Wren
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90acfdcbe8
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Organise test directory into formal and sim
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2021-05-23 07:42:35 +01:00 |