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3 Commits

Author SHA1 Message Date
Luke Wren a536e3baa7 rvcpp sim: add A extension and M-mode traps 
(now passes a lot of the Hazard3 tests)
 2023-04-01 08:21:43 +01:00
Luke Wren 26d699e18c rvcpp simulator: fix bad regnum decode for c.slli outside of x8..x15 2023-04-01 06:02:45 +01:00
Luke Wren 8e7e8f4008 Extend rvcpp ISA sim to cover RVC. Passes RV32IC compliance. 2023-03-21 19:38:46 +00:00