Colin c6d2b351df Change clock from 12 to 25.		2025-04-06 19:47:55 +08:00
..
bitmanip-random	Add support for testcase return code propagation to rvcpp.	2024-03-20 01:05:24 +00:00
common	Add uart software lib.	2025-03-30 00:21:49 +08:00
coremark	Standardise on a single ISA variant for default test builds, and align this with the lightweight toolchain config in the Readme	2024-08-07 13:34:36 -07:00
dhrystone	Standardise on a single ISA variant for default test builds, and align this with the lightweight toolchain config in the Readme	2024-08-07 13:34:36 -07:00
embench	Fix up embench: use a relative link instead of the old env vars, and fix issues building with the recommended GCC14 configuration	2024-08-07 22:49:00 -07:00
hello_multicore	Hook up hello_multicore to automatically build and use the multicore testbench variant	2024-08-07 19:16:03 -07:00
hellow	Change clock from 12 to 25.	2025-04-06 19:47:55 +08:00
riscv-compliance	Remove unused shell script for old riscv-arch-test	2024-08-07 22:33:15 -07:00
riscv-tests	Merge down latest riscv-tests. Seems fine, minimal conflicts.	2024-08-07 19:22:02 -07:00
rvcpp	rvcpp: implement MPRV, and fix up CSR write tracing	2024-06-02 12:46:41 +01:00
rvpy	Make rvpy IO output look exactly like tb_cxxrtl (bringing up embench)	2022-07-06 23:53:11 +01:00
soc_cxxrtl	Change clock from 12 to 25.	2025-04-06 19:47:55 +08:00
sw_testcases	Standardise on a single ISA variant for default test builds, and align this with the lightweight toolchain config in the Readme	2024-08-07 13:34:36 -07:00
tb_cxxrtl	Fix deprecation warning for tb openocd.cfg, and update example output in Readme.md	2024-08-07 16:44:43 -07:00
project_paths.mk	Do not rely on environment variables for any intra-project paths	2024-05-27 16:53:06 +01:00