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.gitignore
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Add synth support.
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2025-03-31 19:10:52 +08:00 |
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Makefile
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Change clock from 12 to 25.
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2025-04-06 19:47:55 +08:00 |
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cmsisdap.cfg
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Change clock from 12 to 25.
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2025-04-06 19:47:55 +08:00 |
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compliance.cfg
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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config_default.vh
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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config_min.vh
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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dapprog
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Change clock from 12 to 25.
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2025-04-06 19:47:55 +08:00 |
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gdb_init
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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gdbinit
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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multicore-openocd.cfg
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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multicore.gtkw
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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openocd-jlink.cfg
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Pass ECP5 fpga and jlink debug core.
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2025-04-02 10:41:27 +08:00 |
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openocd.cfg
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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soc.lpf
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Pass ECP5 fpga and jlink debug core.
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2025-04-02 10:41:27 +08:00 |
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softuart.c
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Add softuart to soc_cxxrtl test.
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2025-03-30 18:36:35 +08:00 |
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softuart.h
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Add softuart to soc_cxxrtl test.
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2025-03-30 18:36:35 +08:00 |
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tb.cpp
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Change clock from 12 to 25.
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2025-04-06 19:47:55 +08:00 |
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tb.f
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Refine soc_cxxrtl and pass demo.
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2025-03-27 16:02:09 +08:00 |
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tb.v
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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tb_common.f
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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tb_multicore.f
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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tb_multicore.v
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |
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waves.gtkw
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Add soc_cxxrtl simulation.
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2025-03-26 16:28:09 +08:00 |