Hazard3/hdl
Luke Wren c8afb4ac33 Add option for fast high-half multiplies 2021-11-29 18:48:02 +00:00
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arith Add option for fast high-half multiplies 2021-11-29 18:48:02 +00:00
debug Fix comment typo in APB clock crossing 2021-11-28 17:40:57 +00:00
peri Add default_nettype none at top of every file, and default_nettype wire at bottom 2021-11-23 22:10:39 +00:00
hazard3.f More work on traps, delaying IRQs which arrive whilst a load/store address phase is stalled to avoid deassertion on the bus 2021-05-29 18:00:43 +01:00
hazard3_config.vh Add option for fast high-half multiplies 2021-11-29 18:48:02 +00:00
hazard3_config_inst.vh Add option for fast high-half multiplies 2021-11-29 18:48:02 +00:00
hazard3_core.v Add option for fast high-half multiplies 2021-11-29 18:48:02 +00:00
hazard3_cpu_1port.v Add default_nettype none at top of every file, and default_nettype wire at bottom 2021-11-23 22:10:39 +00:00
hazard3_cpu_2port.v Add default_nettype none at top of every file, and default_nettype wire at bottom 2021-11-23 22:10:39 +00:00
hazard3_csr.v Add Hazard3's registered marchid value to hdl and docs 2021-11-28 19:53:49 +00:00
hazard3_decode.v First pass at implementing bitmanip. Breaks CXXRTL. Ooop 2021-11-25 23:30:35 +00:00
hazard3_frontend.v Cleanup order of declaration/use of a couple of wires 2021-11-25 15:16:59 +00:00
hazard3_instr_decompress.v Add default_nettype none at top of every file, and default_nettype wire at bottom 2021-11-23 22:10:39 +00:00
hazard3_ops.vh First pass at implementing bitmanip. Breaks CXXRTL. Ooop 2021-11-25 23:30:35 +00:00
hazard3_regfile_1w2r.v Add default_nettype none at top of every file, and default_nettype wire at bottom 2021-11-23 22:10:39 +00:00
hazard3_width_const.vh First pass at implementing bitmanip. Breaks CXXRTL. Ooop 2021-11-25 23:30:35 +00:00
rv_opcodes.vh Add bitmanip reference vectors and test scripts. Fix bug in bclr implementation 2021-11-27 17:19:41 +00:00