remove gen file in fpga

2022-02-27 04:49:27 +00:00 · 2022-02-27 04:49:27 +00:00 · 94c99367ba
parent 1d1237c223
commit 94c99367ba
5 changed files with 1 additions and 156319 deletions
--- a/VexRiscv/fpga/.gitignore
+++ b/VexRiscv/fpga/.gitignore
@ -0,0 +1 @@
+gen
--- a/VexRiscv/fpga/gen/soc.json
+++ b/VexRiscv/fpga/gen/soc.json
--- a/VexRiscv/fpga/gen/synth.log
+++ b/VexRiscv/fpga/gen/synth.log
--- a/VexRiscv/fpga/gen/synth.v
+++ b/VexRiscv/fpga/gen/synth.v
--- a/VexRiscv/fpga/gen/synth.ys
+++ b/VexRiscv/fpga/gen/synth.ys
@ -1,5 +0,0 @@
-read_verilog ../Murax.v
-hierarchy -check -top Murax
-synth -run coarse; opt -fine
-write_verilog -noexpr -noattr gen/synth.v
-synth_ecp5 -top Murax -json gen/soc.json