4900ebb693
scripts/icestorm: force -march=rv32i
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The IceStorm example core doesn't include compressed instructions or the
MULT extension; it is an rv32i core, not rv32i[m|c]. If the given
riscv32 toolchain is not explicitly told to generate rv32i code for the
firmware, it may generate invalid instructions which cause a trap during
simulation or on the hardware itself (although CATCH_ILLINSN is set to
zero in this case, too).
Luckily, any rv32i* toolchain (rv32imc for example) can fit the bill
here -- there's no use of libgcc or anything (which might introduce
illegal instructions generated previously) so just forcing the compiler
to generate the right code works nicely.
Signed-off-by: Austin Seipp <aseipp@pobox.com>
2019-01-11 16:09:07 -06:00
fc71cadda4
scripts/icestorm: switch to nextpnr-ice40
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nextpnr-ice40 gives a better fMAX for this design (by about ~9Mhz for
me: ~59MHz -> ~68MHz) and is The Way Of The Future.
Signed-off-by: Austin Seipp <aseipp@pobox.com>
2019-01-11 16:09:07 -06:00
070367c88d
scripts/icestorm: touch up Makefile a bit
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This touches up the Makefile so that it:
- uses $@, $< and $^ in more places for brevity and robustness (typo
guards, etc)
- tracks dependencies slightly better (e.g. .pcf file changes weren't
tracked before)
Signed-off-by: Austin Seipp <aseipp@pobox.com>
2019-01-11 15:59:56 -06:00
42b7477ba7
Add shell.nix for Nix-based PicoRV32 development
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The net result of this is that cd'ing into the main source directory and
running:
$ nix-shell
will get you every tool needed to immediately do RISC-V development with
picorv32 or picosoc (assuming you're targeting ICE40 or ECP5).
The shell.nix file contains many comments on how to use the resulting
environment.
Signed-off-by: Austin Seipp <aseipp@pobox.com>
2019-01-11 15:58:31 -06:00
9bf2fcb410
gitignore: update to ignore verilator artifacts
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Signed-off-by: Austin Seipp <aseipp@pobox.com>
2019-01-11 13:10:43 -06:00
9b70921103
Merge pull request #102 from emilio93/patch-2
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Update vivado scripts
2018-11-09 13:03:48 +01:00
d7daf9b2cd
use 32 bit toolchain
2018-11-08 17:52:05 -06:00
451bf030be
update to current vivado version
2018-11-08 17:51:45 -06:00
de479b0905
Merge pull request #101 from mmicko/master
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Alignment fix for global symbols fixes #97
2018-10-30 10:59:07 +01:00
2f16c46918
Alignment fix for global symbols fixes #97
2018-10-28 18:48:19 +01:00
3a6ac16259
Merge pull request #94 from hutch31/master
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Added new testbench and linker file for ROM load
2018-10-19 13:04:41 +02:00
82b44105a0
Merge pull request #1 from cliffordwolf/master
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Fix typo in README.md
2018-10-18 13:55:02 -07:00
4e766af587
Renamed linker file
2018-10-18 20:52:46 +00:00
5c0e137792
Removed dead code and cleanup before pull request
2018-10-18 20:51:40 +00:00
73318eaeab
Removed multiplier/divider
2018-10-18 20:33:40 +00:00
f47ac81c89
Passing with custom linker file
2018-10-18 18:47:06 +00:00
a721bb0c6e
Fix typo in README.md
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-10-17 12:34:49 +02:00
ef386e8f17
Add libexpt1-dev to list of Ubuntu packages needed for building tools, closes #88
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-10-02 10:03:40 +02:00
cf613d2088
Merge pull request #90 from bobbl/master
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Fix PicoSoC firmware filename for simulation
2018-10-01 14:22:14 +02:00
cb766a3757
Fix PicoSoC firmware filename for simulation
2018-10-01 14:00:21 +02:00
0d573311ce
Merge pull request #89 from emilio93/patch-1
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Update Risc-V website link for tools
2018-09-30 14:27:17 +02:00
e507c54058
Update Risc-V website link for tools
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Current link ends up in 404 error
2018-09-15 12:08:11 -06:00
028aa757df
Merge pull request #85 from olofk/fusesoc-icebreaker
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Add FuseSoC support for icebreaker
2018-09-03 11:02:01 +02:00
7b9641ad97
Add FuseSoC support for icebreaker
2018-09-02 22:48:47 +02:00
23d7bbdc8b
Add rvfi_mode (set to constant 3 = M-mode)
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-31 12:21:01 +02:00
e3ce4ef800
Merge pull request #82 from mattvenn/master
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fixes for hx8k board demo
2018-08-31 12:17:41 +02:00
fabb3eaf70
fix firmware recipes
2018-08-30 22:27:34 +02:00
fe1867817d
fix ifdef to include flash functions for hx8k
2018-08-30 22:27:18 +02:00
e9c5831097
Fix chown call in Makefile (for building tools)
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-26 18:23:55 +02:00
2d6d5c055b
More PicoSoC firmware improvements for icebreaker
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-19 14:39:20 +02:00
68c69136b9
Add icebreaker example PicoSoC implementation
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-19 13:38:59 +02:00
1afe3af452
Add PicoSoC IceBreaker demo
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-18 20:17:21 +02:00
b634224ccb
Merge pull request #79 from olofk/irqconfig
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Expose ENABLE_IRQ_QREGS and PROGADDR_IRQ from picosoc.v
2018-08-18 19:32:35 +02:00
75aa1055f8
Expose ENABLE_IRQ_QREGS and PROGADDR_IRQ from picosoc.v
2018-08-16 22:06:26 +02:00
7c256656c2
PicoSoC: Use RDSR1+RDCR1+WRR instead of RDAR+WRAR
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-16 14:09:12 +02:00
89c2761f57
Update riscv-gnu-toolchain
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-14 20:54:30 +02:00
4c1e0f47a6
Add rs232 decode to picosoc hx8kdemo test bench
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-14 14:27:09 +02:00
28d6f97b00
Fix picosoc quad spi mode (flashio_worker must be multiple of 4 bytes)
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-14 14:26:49 +02:00
b3f292a988
Improve picosoc demo firmware, picosoc firmware build fixes
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-14 13:49:08 +02:00
ce9d92939a
Merge pull request #61 from mmicko/linker-script
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Created lds file (section mapping) and init for data and bss sections
2018-08-14 13:05:56 +02:00
2a0cff8672
Merge pull request #74 from olofk/picosoc-fusesoc_v2
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Picosoc fusesoc v2
2018-08-14 13:04:03 +02:00
12274e9f8a
Add FuseSoC .core file for hx8kdemo
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The core file specifies targets for FPGA implementation (fusesoc
build hx8kdemo) and simulation (fusesoc run --tool=<tool>
--target=sim hx8kdemo --firmware=path/to/firmware.he).
Simulation has been tested successfully with icarus, modelsim and xsim
2018-07-27 23:23:41 +02:00
80f128713d
Add FuseSoC .core file for picosoc
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This allows other cores to depend on the generic parts of picosoc
and use that as a base design.
2018-07-27 23:23:41 +02:00
262da6444c
Add FuseSoC .core file for SPI Flash model
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This allows other cores to depend on spiflash. Can also be used to
run the spiflash testbench with
fusesoc run --tool=<tool> spiflash --firmware=path/to/firmware.hex
This has been tested with icarus, modelsim and xsim. Fails with isim
If --tool is left out, icarus will be used as default
2018-07-26 23:26:43 +02:00
9b6ea045f9
Update riscv-gnu-toolchain to cb6b34b
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-29 22:35:22 +02:00
4fed27fc16
Fix showtrace.py for changed objdump output format
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-25 21:13:14 +02:00
1cc9784d71
Fix "make testbench_verilator" bug
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-25 21:04:30 +02:00
3f55fb4ccb
Improve testbench_verilator
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-25 13:04:49 +02:00
247a19dd58
Add "make test_verilator"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-25 12:53:21 +02:00
147da6432a
Merge pull request #69 from olofk/picosoc_regs_v3
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Bypass picosoc compile order check if PICORV32_REGS is defined.
2018-05-19 12:09:52 +02:00
Austin Seipp
Clifford Wolf
Emilio Rojas
Miodrag Milanovic
Guy Hutchison
Guy Hutchison
Jörg Mische
Olof Kindgren
matt venn