Commit Graph

  • 5ad8ced434 better log for CSRRW instruction mariusmonton 2019-02-18 13:57:24 +0100
  • 9d89f847a0 better dockerfile style mariusmonton 2019-02-18 13:57:02 +0100
  • a275e0fa24 better support to IRQs mariusmonton 2019-02-18 13:56:47 +0100
  • a91e590d6d other usage of docker image mariusmonton 2019-02-15 14:30:12 +0100
  • e31eae3f9e added command line arguments mariusmonton 2019-02-12 14:08:40 +0100
  • 1d4c3ec553 removed unused code mariusmonton 2019-02-12 11:40:25 +0100
  • 492cfd61e9 better extension enumeration mariusmonton 2019-02-12 11:39:15 +0100
  • 111bf08297 added ISR register to vPortSetupTimer() function mariusmonton 2019-02-11 20:36:16 +0100
  • d62892e3dc minor changes, better code mariusmonton 2019-02-11 20:26:23 +0100
  • 6f8cc9ded6 updated with FreeRTOS port mariusmonton 2019-02-11 20:16:32 +0100
  • 1c50b22c27 FreeRTOS portable files for this simulator mariusmonton 2019-02-11 20:12:30 +0100
  • a87743b92d minor changes mariusmonton 2019-02-11 15:54:13 +0100
  • 2c93492ab1 enhanced IRQ support mariusmonton 2019-02-11 15:54:02 +0100
  • 2c2cf3000b typos, register definitions mariusmonton 2019-02-11 15:52:48 +0100
  • 6c0d2708a8 error in docker doc mariusmonton 2019-02-07 22:41:14 +0100
  • 23f12f3daf default all: option mariusmonton 2019-02-06 19:14:23 +0100
  • c00b1582d9 TOC mariusmonton 2019-02-04 13:16:50 +0100
  • 6ea7f7a062 updated docker information mariusmonton 2019-02-03 21:46:38 +0100
  • 50147b4762 Added Docker container mariusmonton 2019-02-03 12:05:06 +0100
  • a8943a111f enable interrupts writing to mstatus mariusmonton 2019-01-22 19:31:13 +0100
  • fa3b178f79 update instruction/second mariusmonton 2019-01-22 18:34:48 +0100
  • 4c89c48fb0 removed SP init, moved to CPU module mariusmonton 2019-01-22 18:30:09 +0100
  • d6f774eaea Timer module test mariusmonton 2019-01-22 18:29:12 +0100
  • e9ef03890f fixed ISR memory alignement mariusmonton 2019-01-22 13:26:41 +0100
  • d83a15eec5 change log level mariusmonton 2019-01-22 12:47:54 +0100
  • 098aebc15d changed IRQ line to TLM socket mariusmonton 2019-01-22 12:43:05 +0100
  • 0c25abdb00 Fixed bug mariusmonton 2019-01-22 12:33:32 +0100
  • 7c263419a8 documentation mariusmonton 2019-01-13 18:39:35 +0100
  • 64030a7cc3 fixed Makefile errors mariusmonton 2019-01-13 18:20:02 +0100
  • 52953bc8de updated with Timer module mariusmonton 2019-01-13 18:12:51 +0100
  • 3316575820 updated mariusmonton 2019-01-13 01:36:38 +0100
  • d875dc2cd3 comparator value explained mariusmonton 2019-01-13 01:33:28 +0100
  • a4a1be7386 IRQ implemented mariusmonton 2019-01-13 01:30:49 +0100
  • 6c3b4347a8 link fixed mariusmonton 2019-01-10 15:02:41 +0100
  • 2db8092a04 update mariusmonton 2019-01-10 14:58:27 +0100
  • f1f98faf13 updates mariusmonton 2019-01-09 23:06:35 +0100
  • 532d9f7c85 fixed compiling options mariusmonton 2019-01-09 23:03:08 +0100
  • 9a7e7abeb0 Better logs Fixed some bugs mariusmonton 2019-01-01 21:11:34 +0100
  • 5c905cb5ca better MISA CSR register support mariusmonton 2018-12-12 18:15:44 +0100
  • 93fe2237b4 better support to hex file mariusmonton 2018-12-12 18:15:21 +0100
  • a2a9c95546 Added A Extensions Added SFENCE instruction mariusmonton 2018-12-12 18:14:35 +0100
  • 1b93e7f569 added time management and cycle counters mariusmonton 2018-11-25 12:07:08 +0100
  • 81f61c52fc fixed dump function! mariusmonton 2018-11-25 12:05:09 +0100
  • 0f291016c5 add support to RaiseExecption to all instructions mariusmonton 2018-11-24 23:46:47 +0100
  • 4114f482d6 Doxygen mariusmonton 2018-11-24 23:46:01 +0100
  • d5489523de better log output mariusmonton 2018-11-22 16:53:26 +0100
  • c832b2f80f all tests passed! mariusmonton 2018-11-22 16:42:06 +0100
  • b9e26e4dea first implementation supporting exceptions mariusmonton 2018-11-22 14:38:31 +0100
  • 6726b59c3c bug on SLLI mariusmonton 2018-11-22 12:39:16 +0100
  • 0cd34f9f3b fixed CSRRS and CSRRC bug mariusmonton 2018-11-22 12:08:16 +0100
  • 9cd354b822 C examples halts simulation mariusmonton 2018-11-19 17:22:18 +0100
  • ed7be704f9 implementation of all remaining C extension mariusmonton 2018-11-19 15:56:08 +0100
  • e67e8b2c08 updated tests mariusmonton 2018-11-15 12:33:21 +0100
  • 3f7ecfa9df bug fixes mariusmonton 2018-11-14 23:50:01 +0100
  • adc30178ab fixed detection of M extension mariusmonton 2018-11-14 23:14:06 +0100
  • 5b8862b251 better explanation mariusmonton 2018-11-14 19:19:05 +0100
  • aa2a47b571 add M extensions mariusmonton 2018-11-14 19:15:43 +0100
  • a8bdc37c12 all tests passed! mariusmonton 2018-11-14 19:14:57 +0100
  • d449ea5502 adding M extensions to simulator mariusmonton 2018-11-12 17:41:17 +0100
  • bdf261cbc6 default value to variable to remove a warning mariusmonton 2018-11-12 17:08:26 +0100
  • 5c6102ea17 Makefile now uses environtment variable if available mariusmonton 2018-11-11 23:08:19 +0100
  • b5ae897d3c updated README file with C_extensions module mariusmonton 2018-11-11 11:18:16 +0100
  • 0f56cb0288 Merge branch 'C_extension' Functional (almost) execution of C extensions mariusmonton 2018-11-11 11:12:22 +0100
  • 1fcbcf500b typos 6 minor changes mariusmonton 2018-11-11 11:12:12 +0100
  • 36646a182e buf, intermediate value whould be 32 bits long mariusmonton 2018-11-08 18:55:47 +0100
  • 9d7d84c7f8 bugs! mariusmonton 2018-11-07 18:43:10 +0100
  • aa334b5fcc fixed module name mariusmonton 2018-10-17 23:51:53 +0200
  • 5b70725917 fixed module name mariusmonton 2018-10-17 23:47:02 +0200
  • 598699cd54 more bug fixes, still get j zero in func3 test example mariusmonton 2018-10-17 17:42:43 +0200
  • ecb26b87de last test, using glibc library mariusmonton 2018-10-15 17:36:07 +0200
  • 374b853117 first version of C.extensions mariusmonton 2018-10-15 17:35:16 +0200
  • 97b15ca7a3 better (?) Log output mariusmonton 2018-10-15 17:34:42 +0200
  • a409f48d40 Fixed wrong immediate accesses mariusmonton 2018-10-15 17:33:41 +0200
  • 5ae765b304 Proper initialization of sp register mariusmonton 2018-10-15 17:32:37 +0200
  • aa526943b9 Added instructions to pass riscv-tests mariusmonton 2018-10-15 13:51:41 +0200
  • f17b3b75d5 new setters to Instruction class mariusmonton 2018-10-10 18:58:08 +0200
  • 08044ac626 * Instruction: changed name to accessors * CPU: moved huge switch case to a new function * Execute: changed to use instruction new accessors mariusmonton 2018-10-10 12:08:53 +0200
  • 744a2010a5 typo mariusmonton 2018-10-08 12:35:07 +0200
  • 557e3c1ba4 old folders removed mariusmonton 2018-10-06 22:20:02 +0200
  • d405857f25 Moved C and ASM code to tests folder mariusmonton 2018-10-06 22:19:29 +0200
  • 2a56493fc4 more badges mariusmonton 2018-09-27 20:26:17 +0200
  • 912ee3a44e added twitter address mariusmonton 2018-09-27 16:15:59 +0200
  • 0f0205709b hard link mariusmonton 2018-09-27 15:11:02 +0200
  • 0787a7577f added travis status mariusmonton 2018-09-27 15:10:06 +0200
  • f177f79dcc errors mariusmonton 2018-09-27 15:02:33 +0200
  • f938bfad4e changed to std11 c++ version mariusmonton 2018-09-27 14:58:39 +0200
  • af2f6d6bd6 errors mariusmonton 2018-09-27 14:36:54 +0200
  • 70de804983 non-static data intialization removed, moved to constructor mariusmonton 2018-09-27 14:32:40 +0200
  • 2cf3694691 relative path to systemc mariusmonton 2018-09-27 14:26:01 +0200
  • 4467fb29f9 errors mariusmonton 2018-09-27 14:11:06 +0200
  • a80d33a04e errors mariusmonton 2018-09-27 14:07:50 +0200
  • 1345f9cd08 errors mariusmonton 2018-09-27 14:03:22 +0200
  • 8418594651 added travis file mariusmonton 2018-09-27 13:38:16 +0200
  • e1db658f75 Module renamed mariusmonton 2018-09-21 13:06:51 +0200
  • a5773202e1 renamed RISC_V_execute to Execute mariusmonton 2018-09-21 13:05:42 +0200
  • 2920415d93 added hierarchy image mariusmonton 2018-09-21 12:17:31 +0200
  • afbf317941 updated documentation mariusmonton 2018-09-21 11:23:31 +0200
  • e6b95298cd new C examples ,modified Makefile mariusmonton 2018-09-21 09:26:02 +0200
  • 4ba8b1bbb7 Added better PC control mariusmonton 2018-09-21 09:25:47 +0200
  • dcd3a8c3fe better log output mariusmonton 2018-09-21 09:25:27 +0200