Luke Wren
|
c7a32c4d00
|
SBA: fix alignment check using a stale address when the trigger is an sbaddress write. Fix new transfers being allowed to start when sberror or sbbusyerror are set.
|
2022-07-03 19:02:30 +01:00 |
|
Luke Wren
|
9e15cd3485
|
Add standalone SBA-to-AHB shim, and make SBA off by default in the DM
|
2022-07-03 15:30:33 +01:00 |
|
Luke Wren
|
d6bef56788
|
Fix missing byte picking/replication in non-word-aligned SBA transfers
|
2022-07-03 14:22:12 +01:00 |
|
Luke Wren
|
51bc26f8ac
|
First pass at adding system bus access to DM. Currently only the 2-port processor supports SBA patchthrough.
|
2022-07-03 00:25:47 +01:00 |
|
Luke Wren
|
36cee73d1f
|
Fix acmd FSM not selecting the correct hart signal for its state transitions, and make flush take precedence over debug injection in frontend. (Changes from aborted abstract access memory implementation, see abstract-access-memory branch)
|
2022-07-02 22:46:20 +01:00 |
|
Luke Wren
|
c2756e79fc
|
Fix misreading of spec: hartsel hart is selected in addition to those bits set in hart array mask, when hasel is set.
|
2022-06-26 19:58:01 +01:00 |
|
Luke Wren
|
ad8f883406
|
First pass at hart array mask register in DM
|
2022-06-25 20:34:53 +01:00 |
|
Luke Wren
|
ea2b8888a4
|
Update copyright years
|
2022-06-09 00:12:01 +01:00 |
|
Luke Wren
|
b0d28447ab
|
New license headers: DWTFPL -> Apache 2.0
|
2021-12-13 23:23:40 +00:00 |
|
Luke Wren
|
dfb07822ee
|
Remove UART DTM
|
2021-12-02 02:08:16 +00:00 |
|
Luke Wren
|
be6b2f3f76
|
Fix up DTMs to use byte addressing
|
2021-12-02 02:05:23 +00:00 |
|
Luke Wren
|
1ebccb7cce
|
Switch DM to use byte addresses on APB, not word addresses
|
2021-12-02 01:47:30 +00:00 |
|
Luke Wren
|
1aa9dbcddd
|
Fix comment typo in APB clock crossing
|
2021-11-28 17:40:57 +00:00 |
|
Luke Wren
|
e7466ae4be
|
Move DM data0 CSR into the M-custom space, and document this
|
2021-11-28 15:52:52 +00:00 |
|
Luke Wren
|
e05e9a4109
|
Add default_nettype none at top of every file, and default_nettype wire at bottom
|
2021-11-23 22:10:39 +00:00 |
|
Luke Wren
|
70a44d9681
|
Small code cleanup
|
2021-07-24 10:08:27 +01:00 |
|
Luke Wren
|
115cb2c50f
|
Tweaks to example soc configuration
|
2021-07-23 23:08:23 +01:00 |
|
Luke Wren
|
2ae30183aa
|
Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG.
|
2021-07-23 18:32:47 +01:00 |
|
Luke Wren
|
8ceae7e9e6
|
Start hacking on ECP5 JTAG DTM
|
2021-07-23 00:36:55 +01:00 |
|
Luke Wren
|
41477ce479
|
Extract DTM bus/control logic from the JTAG-related parts
|
2021-07-22 19:26:25 +01:00 |
|
Luke Wren
|
5deff12f95
|
DM: don't report as running/halted in dmstatus if unavailable.
|
2021-07-17 16:46:39 +01:00 |
|
Luke Wren
|
ab0b4a04f0
|
Also support progbuf in abstractauto.
|
2021-07-17 15:08:00 +01:00 |
|
Luke Wren
|
5aca6be572
|
Implement data0 inside of DM instead of core, so it gets correct reset. Add dummy tselect CSR.
|
2021-07-16 18:28:30 +01:00 |
|
Luke Wren
|
ce5152a4f4
|
Implement HALTSUM0 and HALTSUM1 registers
|
2021-07-16 17:58:28 +01:00 |
|
Luke Wren
|
93c7039ea1
|
Sync doc updates
|
2021-07-12 22:13:31 +01:00 |
|
Luke Wren
|
4b650ac437
|
DM: add missing w1c to abstract cmderr, add capture of last abstract command for use with abstractauto
|
2021-07-12 21:26:00 +01:00 |
|
Luke Wren
|
42632e325a
|
Fix brokenness of JTAG-DTM and CDC, add openocd remote bitbang testbench for DTM + DM + core
|
2021-07-12 21:21:16 +01:00 |
|
Luke Wren
|
27674be996
|
Start hacking in a JTAG-DTM
|
2021-07-12 01:49:32 +01:00 |
|
Luke Wren
|
f7b3097ad6
|
Fix some bugs/typos in DM, add a tb to run read/write vectors against DM, confirm that GPR read/write works
|
2021-07-11 16:20:39 +01:00 |
|
Luke Wren
|
0dce59daaf
|
Start hacking together a DM
|
2021-07-11 05:11:19 +01:00 |
|
Luke Wren
|
83244c6651
|
Add Read ID command to UART DTM
|
2021-07-10 16:14:35 +01:00 |
|
Luke Wren
|
3312ea7022
|
Add draft UART DTM
|
2021-07-08 17:57:46 +01:00 |