e2981d8a50
remove unused files
2021-11-28 22:26:49 +01:00
724cf258ce
merge with log branch. New log mechanism
2021-11-25 13:01:23 +01:00
e6bf4e30a4
Use spdlog library as logger.
2021-11-25 12:11:18 +01:00
2c4de6a427
Fixed types
2021-11-16 10:27:28 +01:00
61be24e608
changed pointer by reference
2021-11-16 10:26:42 +01:00
f7c9f47c3f
changed pointer by reference
2021-11-16 10:25:47 +01:00
5caf1b77c8
Rework on DMI mechanism. Limited memory to 16MB
2021-11-16 10:20:59 +01:00
a42877ab95
change types from uintX_t to std::uintX_t
2021-11-11 17:10:23 +01:00
d8a20db976
New function to increase PC by 2 (incPCby2) instead of a parameter to incPC function, could be faster code.
2021-11-11 14:52:50 +01:00
de1aa4c7a6
changed C array to std::array
2021-11-09 11:15:36 +01:00
1890b62f07
Changed registers to uint32_t.
...
Removed unused initializers.
Add cast from uint to int when necessary.
2021-11-08 09:49:08 +01:00
908b7e965d
Better output, change registers to unsigned int as base. Should be uint32_t?
2021-11-08 09:25:36 +01:00
e9e4543f72
Exception doesn't stop simulation
2021-11-08 09:24:43 +01:00
08d699d34e
If write to HOST, stop simulation
2021-11-08 09:21:59 +01:00
24c593e715
JALR cannot be const because calls RaiseException
2021-11-08 09:21:19 +01:00
56c5203899
Use real addresses in memory, extend memory size fo 0xFFFFFFFF
2021-07-04 22:47:47 +02:00
c9bab2ae27
Remove SC_MODULE macros, other trivial code clean-up
2021-06-30 15:37:18 +02:00
1777a3bc9a
code clean-up (using clang-tidy)
2021-04-26 00:20:29 +02:00
3b3813bd07
code clean-up (using clang-tidy)
2021-04-25 19:52:12 +02:00
512e701f22
removed unused constructor parameters
2021-02-21 14:04:11 +01:00
49103e5591
Prepare for debug
2021-02-21 13:49:05 +01:00
4c60d6ae75
Prepare for debug
2021-02-21 13:48:41 +01:00
9b7b5635d2
removed CPU64 files (unused)
2021-02-02 19:56:14 +01:00
6286c640d9
Remove unused methods
2021-02-02 19:52:39 +01:00
03c95d2de3
removed duplicate code
2021-02-01 12:24:25 +01:00
22b7ec4c03
remove duplicated methods
2021-02-01 11:49:38 +01:00
cc9045341d
override keyword to virtual methods
2021-02-01 11:25:04 +01:00
a48e552926
some methods now are const, reference class parameters, other minor changes
2021-01-23 11:44:10 +01:00
cb63c65d7f
Implemented C_EBREAK instruction
2021-01-18 09:14:54 +01:00
286dbf07a6
added const keyword to const methods
2021-01-17 15:40:47 +01:00
a019de5eb3
reduce variable scope
2021-01-15 15:51:03 +01:00
2ca86d4688
array init
2021-01-15 15:16:56 +01:00
3bf210556e
fixed initialization array error
2021-01-15 10:27:14 +01:00
9636a53624
Merge branch 'master' of https://github.com/mariusmm/RISC-V-TLM
2021-01-15 10:24:31 +01:00
f7dbf106cc
trivial changes to increase performance
2021-01-15 09:09:52 +01:00
a713e13705
missing header
2020-12-10 19:34:57 +01:00
1e9ca5c4e3
documentation
2020-11-12 11:02:26 +01:00
abf47625a1
change fixed array for CSR to unordered map
2020-06-21 00:29:45 +02:00
376d3e9e4f
better container class
2020-06-20 11:22:22 +02:00
6ff0da0313
new log file, same performance
2020-06-09 16:37:29 +02:00
5ee634e4b4
Major refactoring!
...
* A_Instruction, C_Instruction and M_Instruction renamed to *_extension
* These files decode and executes extensions
* These classes use a new base clase extension_base
* Execute & Instruction classes heavyly modified:
* Execute now is BASE_ISA and decodes and executes base ISA, Zicsr & Zifencei
* Instruction keeps the instruction being executed, nothing else
* Add memory interface to ISS to clear the code and the structure
* Removed "using namespace " directives, all classes are called using their namespace
* Added proper header to each file
* Added license to all files
2020-06-02 13:08:38 +02:00
95b9685ad9
removed creation of class every CPU loop. It should get better performance
2020-05-28 17:18:50 +02:00
2aaa83a064
new MSTATUH CSR register
2020-04-14 12:27:09 +02:00
5d30416955
Fixed some warnings from coverity
2020-04-10 16:43:22 +02:00
e75a4bfdfd
add missing CSR register MCYcLE and similars
2019-09-13 00:00:59 +02:00
1bb3200eb6
add destructor for clean exit
2019-09-08 11:42:05 +02:00
0415ba3c66
added xterm window for trace output
2019-09-08 11:41:06 +02:00
d42d67b991
DMI access added (if available)
2019-03-28 22:52:36 +01:00
a275e0fa24
better support to IRQs
2019-02-18 13:56:47 +01:00
2c2cf3000b
typos, register definitions
2019-02-11 15:52:48 +01:00
mariusmonton