6abd93eb49
Oops, masked the wakeup-on-halt request path when I masked IRQs on WFI state.
2022-08-29 16:15:19 +01:00
099f0467fb
Clean up remnants of the 'wfi_is_nop' thing that seemed like a good idea at the time
2022-08-29 15:56:57 +01:00
da4097ecd8
Delay pwrup_req->pwrup_ack in tb
2022-08-29 14:55:11 +01:00
954bae5cf1
Implement block/unblock instructions, and fix questionable partial masking of sleep signals on exceptions. Add simple test for self-block/unblock with loopback in tb.
2022-08-29 14:52:01 +01:00
b352d3878d
Update docs for new power control extension
2022-08-28 19:54:55 +01:00
2ae2463b97
First stab at adding wake/sleep state machine
2022-08-28 19:50:04 +01:00
ce93c45e69
Add docs section for custom extensions
2022-08-28 15:50:26 +01:00
bf38d93d33
Remove references to AHB-Lite, describe buses as (a subset of) AHB5
2022-08-28 14:15:20 +01:00
7d18a21734
Editing
2022-08-27 20:49:55 +01:00
d56e217a40
Work on docs. Document config options, expand the intro, move instruction timings and pseudocode to appendices.
2022-08-27 20:13:21 +01:00
a79c857d82
Bump riscv-tests: enable hardware instruction breakpoints in hardware tests
2022-08-27 17:05:02 +01:00
9a60f06c43
Fix trigger enable condition
2022-08-23 01:05:46 +01:00
fef6d80fd4
tcontrol.mpte is not supposed to change on trap exit, unlike mstatus.mpie
2022-08-23 00:19:56 +01:00
9e11c0e5a8
Fix tdata1.dmode being writable from M-mode
2022-08-23 00:08:17 +01:00
04f138ae0e
Fix mcontrol.execute not being writable. Enable hardware breakpoint debug tests: Hwpb1/2, JumpHBreak, TriggerExecuteInstant
2022-08-23 00:05:30 +01:00
49c2edeff8
Avoid reserved keyword
2022-08-22 10:26:20 +01:00
53902a901b
Fix bad rdata width for tdata1 (which also caused the trigger type to appear as legacy SiFive, oops)
2022-08-22 09:47:19 +01:00
f9dafa3867
Update readme
2022-08-22 09:25:37 +01:00
b90d12efed
CSRs: avoid use of wdata_update in rdata for meicontext, which the SMT2 backend sees as a loop.
...
There is no functional loop here since this is an acyclic path between different bits of the rdata vector, but it makes sense that this would confuse tools that don't bitblast all the vectors.
2022-08-22 09:18:57 +01:00
ba775563d5
Fix suspicious gating of jump request
2022-08-22 09:10:12 +01:00
6e2076268c
Update CSR readability/writability tests for new CSRs
2022-08-22 08:50:57 +01:00
6e3799eed0
First attempt at hacking in triggers, at least seems to have not broken other exception logic. Not yet tested.
2022-08-22 08:47:03 +01:00
5d6b5a80b0
Standardise on ifndef YOSYS around default_nettype wire
2022-08-21 13:22:55 +01:00
4c098d76a7
Fix some whitespace issues, and avoid redefinition of RVOPC macros
2022-08-21 13:09:28 +01:00
b994674c5a
Cleanup to avoid negative array index (legal but causes whinging)
2022-08-20 18:13:45 +01:00
3b7cd9bc96
Cleanup some unused signals
2022-08-20 16:44:39 +01:00
96e55a5446
Replace localparams with defines in rv_opcodes.vh, to avoid slightly dubious localparam to casez Z-propagation
2022-08-20 16:22:04 +01:00
d299a3ca4e
More width tweaks
2022-08-20 16:11:58 +01:00
bc274867c0
More width mismatch fixes
2022-08-20 15:27:14 +01:00
dbe9a7824a
Cleanup of some width mismatches in instruction decompress
2022-08-20 14:58:41 +01:00
276830ecb6
Fix missing default assignment of i_m in PMP decode
2022-08-16 09:23:42 +01:00
65daa739c4
.gitignore
2022-08-16 09:21:14 +01:00
be05dc32d4
Oops, typo in update of new pmpcfg_m field
2022-08-11 20:46:32 +01:00
8b630d2ac6
Whoops I needed that constant
2022-08-10 01:00:47 +01:00
64dc31244e
Add top/bottom-half IRQ test
2022-08-10 00:09:13 +01:00
a44ff9b6f1
Add test for IRQ force array
2022-08-09 23:38:14 +01:00
f47f603595
Doc typos
2022-08-09 00:05:51 +01:00
cd69fcdbbc
Docs: Add date to title page, and rebuild PDF with recent CSR changes
2022-08-08 23:57:20 +01:00
259a402e28
Describe new pmpcfgm0 register
2022-08-08 23:15:28 +01:00
5819f8eb7e
Remove wrong/useless mxr logic in PMP
2022-08-08 18:45:37 +01:00
5894ddf15c
Fix outdated expected output in irq_set_all_with_pri test
2022-08-08 18:44:58 +01:00
92ebbbe95f
Add pmpcfgm0 register: make regions M-mode without locking them
2022-08-08 18:34:55 +01:00
65e3d1c48b
Fix bad IRQ_IMPL_MASK indexing in meipra write
2022-08-08 18:15:38 +01:00
457b5e5f1a
Fix some doc sections which assumed only M-mode was supported
2022-08-08 17:35:39 +01:00
ef927d0d23
Dumb typo
2022-08-08 10:26:36 +01:00
026b529bc5
Fix asm example in docs to set meicontext.clearts when saving
2022-08-07 23:17:39 +01:00
ad5fd24772
- Fix signal named priority, which is a keyword in SV
...
- Fix incorrect HIGHEST_WINS behaviour in one-hot selector
- Add test for asserting 32 IRQs at 16 priorities at once
- Add an entry counter to the soft dispatch code so tests can check
the number of times hardware entered the vector
2022-08-07 23:17:03 +01:00
2e3d69e98f
Forgot to add expected output for preemption test
2022-08-07 22:08:50 +01:00
5e72ec8941
Fix a couple of bugs in preemption priority update, add simple IRQ preemption test
2022-08-07 22:04:42 +01:00
15cb21ae43
First pass at implementing the new IRQ controls. Works well enough that the old tests pass :)
2022-08-07 20:51:12 +01:00
Luke Wren