Olof Kindgren
75aa1055f8
Expose ENABLE_IRQ_QREGS and PROGADDR_IRQ from picosoc.v
2018-08-16 22:06:26 +02:00
Clifford Wolf
7c256656c2
PicoSoC: Use RDSR1+RDCR1+WRR instead of RDAR+WRAR
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-16 14:09:12 +02:00
Clifford Wolf
4c1e0f47a6
Add rs232 decode to picosoc hx8kdemo test bench
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-14 14:27:09 +02:00
Clifford Wolf
28d6f97b00
Fix picosoc quad spi mode (flashio_worker must be multiple of 4 bytes)
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-14 14:26:49 +02:00
Clifford Wolf
b3f292a988
Improve picosoc demo firmware, picosoc firmware build fixes
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-08-14 13:49:08 +02:00
Clifford Wolf
ce9d92939a
Merge pull request #61 from mmicko/linker-script
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Created lds file (section mapping) and init for data and bss sections
2018-08-14 13:05:56 +02:00
Olof Kindgren
12274e9f8a
Add FuseSoC .core file for hx8kdemo
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The core file specifies targets for FPGA implementation (fusesoc
build hx8kdemo) and simulation (fusesoc run --tool=<tool>
--target=sim hx8kdemo --firmware=path/to/firmware.he).
Simulation has been tested successfully with icarus, modelsim and xsim
2018-07-27 23:23:41 +02:00
Olof Kindgren
80f128713d
Add FuseSoC .core file for picosoc
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This allows other cores to depend on the generic parts of picosoc
and use that as a base design.
2018-07-27 23:23:41 +02:00
Olof Kindgren
262da6444c
Add FuseSoC .core file for SPI Flash model
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This allows other cores to depend on spiflash. Can also be used to
run the spiflash testbench with
fusesoc run --tool=<tool> spiflash --firmware=path/to/firmware.hex
This has been tested with icarus, modelsim and xsim. Fails with isim
If --tool is left out, icarus will be used as default
2018-07-26 23:26:43 +02:00
Olof Kindgren
2ceb472178
Bypass picosoc compile order check if PICORV32_REGS is defined.
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Previously, picosoc.v needed to be sourced before picorv32.v to
ensure that the PICORV32_REGS `define (used to select implementation
for the register file) was set to picosoc_regs
This allows for overriding PICORV32_REGS, e.g. by setting it
externally in the EDA tool invocation. In this case, the compile
order between picorv32.v and picosoc.v is not important.
Note: This change will break the safety check if PICORV32_REGS
is defined between sourcing picorv32.v and picosoc.v
2018-05-18 23:52:31 +02:00
Olof Kindgren
c9470e3e04
spiflash: Allow setting firmware from plusarg
2018-05-15 09:53:33 +02:00
Olof Kindgren
d26e505251
Fix spiflash_tb
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Update expected two first Flash words to reflect changes in start.s
Add dummy SPI cycles to account for latency
2018-05-11 22:56:52 +02:00
Larry Doolittle
8b32bc5bd6
Fix miscellaneous typos in documentation
2018-04-17 17:53:08 +02:00
Miodrag Milanovic
9300a510c5
Created lfs file (section mappint) and init for data and bss sections
2018-04-16 20:04:01 +02:00
Luke Valenty
a0d5f8efd7
add .data and .bss segments to picosoc
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added .data and .bss segments to picosoc firmware linker script so that static variables may be used.
2018-04-07 18:42:59 -07:00
Clifford Wolf
65f32c38db
Fix picosoc hx8kdemo_tb
2017-11-11 19:49:01 +01:00
Clifford Wolf
ad08edd2e5
Add PICORV32_REGS mechanism for ASIC sram instantiation
2017-10-01 15:45:46 +02:00
Clifford Wolf
500db14e44
Improve PicoSoC overview.svg
2017-09-22 05:09:03 +02:00
Clifford Wolf
694b9390fd
Enable a bunch of PicoRV32 features in PicoSoC
2017-09-22 04:52:44 +02:00
Clifford Wolf
9e5903fbbe
Update PicoSoC README
2017-09-21 19:58:55 +02:00
Clifford Wolf
ae0e5a6c94
Remove generic PicoSoC testbench
2017-09-21 19:45:41 +02:00
Clifford Wolf
8b5f2aeff3
Merge branch 'master' of github.com:cliffordwolf/picorv32
2017-09-21 19:37:12 +02:00
Clifford Wolf
29b1d0d7de
Resize overview.svg
2017-09-21 19:37:04 +02:00
Clifford Wolf
1c66c76c0e
Update README.md
2017-09-21 19:35:29 +02:00
Clifford Wolf
211d0e9c98
Add picosoc overview.svg
2017-09-21 19:32:30 +02:00
Clifford Wolf
ebc4d1c4a1
Update README.md
2017-09-21 18:53:54 +02:00
Clifford Wolf
45bd9b81ea
Improve picosoc performance.{py,png}
2017-09-21 18:46:09 +02:00
Clifford Wolf
0c9dce7bc2
Add picosoc performance.{py,png}
2017-09-21 18:40:38 +02:00
Clifford Wolf
559cd8db78
Improve PicoSoC example firmware
2017-09-21 16:00:19 +02:00
Clifford Wolf
c06ba38113
Add PicoSoC spimem Dual I/O support
2017-09-21 15:50:50 +02:00
Clifford Wolf
c00811e8e4
Improve PicoSoC example firmware
2017-09-20 23:53:53 +02:00
Clifford Wolf
dea9b88249
Fix bug in PicoSoC spimemio
2017-09-20 23:44:16 +02:00
Clifford Wolf
51436b1c50
PicoSoC QSPI DDR progress
2017-09-20 20:17:27 +02:00
Clifford Wolf
7639e6ebac
PicoSoC QSPI and XIP now working (tested in hardware)
2017-09-19 15:32:41 +02:00
Clifford Wolf
2cc1256ce7
Improve PicoSoC demo firmware
2017-09-18 00:43:38 +02:00
Clifford Wolf
506cda5ee6
Update picosoc README.md
2017-09-16 22:40:53 +02:00
Clifford Wolf
dabebeb008
Improve PicoSoC demo firmware (read flash ID is working now)
2017-09-16 22:08:05 +02:00
Clifford Wolf
76124b8649
Removed UB from picosoc demo firmware
2017-09-15 19:55:22 +02:00
Clifford Wolf
797c21e95c
Improve PicoSoC demo firmware
2017-09-15 16:28:19 +02:00
Clifford Wolf
cfd4933272
Switch PicoSoC firmware to C
2017-09-15 15:35:44 +02:00
Clifford Wolf
48f729d13c
Update PicoSoC hx8kdemo
2017-09-15 15:34:45 +02:00
Clifford Wolf
66638dcee0
Improve picosoc firmware build process
2017-09-15 15:33:20 +02:00
Clifford Wolf
d087b01bb5
Update picosoc/hx8kdemo_tb.v
2017-09-15 14:48:13 +02:00
Clifford Wolf
48b13daef2
Update picosoc memory map
2017-09-15 14:47:50 +02:00
Clifford Wolf
6ade29cce3
Add Cypress S25FL128L datasheet link to picosoc/spiflash.v
2017-09-12 22:46:57 +02:00
Clifford Wolf
99f0cafd19
Add simple UART to PicoSoC
2017-08-11 19:30:53 +02:00
Clifford Wolf
febb4b1318
Improve and cleanup picosoc firmware
2017-08-11 16:15:07 +02:00
Clifford Wolf
78f2f5efd2
Add support for QSPI DDR mode, Add SPI MEMIO config reg
2017-08-11 15:57:42 +02:00
Clifford Wolf
53b175d0fb
Add spimemio QSPI support
2017-08-11 15:02:31 +02:00
Clifford Wolf
89ad9fc85a
Fix bug in picosoc spimemio and some cleanups in hx8kdemo
2017-08-08 12:07:17 +02:00